DATASHEET
PECL TO CMOS CONVERTER
ICS508
Description
Features
The ICS508 is the most cost effective way to generate
a high quality, high frequency CMOS clock output from
a PECL clock input.
• Packaged in 8 pin SOIC (Pb-free) or die
• Separate VDD supplies allow voltage translation
• Clock frequency of 0 - 250 MHz
The ICS508 has separate VDD supplies for the PECL
input buffer and the output buffer, allowing different
voltages to be used. For example, the input clock could
use a 3.3 V supply while the output operates from 2.5V.
• Duty cycle of 45/55
• Operating voltages of 2.375 to 5.5V
• Tri-state output for board level testing
• 24mA output drive capability
The device has an Output Enable pin that tri-states the
clock output when the OE pin is taken low.
• Industrial temperature version available
• Advanced, low power, sub-micron CMOS process
TM
The ICS508 is a member of IDT’s ClockBlocks
family.
Block Diagram
VDDP
VDDC
PECLIN
PECLIN
Output
CLK
Buffer
OE
GND
GND
IDT™ / ICS™ PECL TO CMOS CONVERTER
1
ICS508
REV H 051310
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
