CrystalFree™ Differential Oscillator
3LG
Ultra Low Power Oscillators
PRELIMINARY DATA SHEET
Features
. Frequency Range:
. Output Type:
24 to 125MHz
LVDS / LVPECL / HCSL
± 50 ppm
. Stability:
. Supply Voltage:
. Power Consumption:
. Standby Current:
. Standard Package:
2.5V, 3.3V
10.9 mA (2.5V LVDS)
< 1 uA
5.0 x 3.2 x 0.85 mm
7.0 x 5.0 x 0.85 mm
This product is rated “Green”, please contact factory
for environmental compliancy information
. Operating Temperature: 0 to 70 °C
Specification
Symbol
Specifications
Specifications
LVPECL
Conditions
100 Ω differential termination
LVPECL: 50 Ω termination to VDD-2V
LVDS:
Parameter
LVDS
LVPECL
HCSL
LVDS
HCSL
HCSL:
50 Ω termination to GND
Supply Voltage
Frequency Stability
Supply Current
Quiescent Current
Input LOW / HIGH level
Rise / Fall Time
Amplitude
Mid Level (offset)
Symmetry
VDD
FSTB
IDD
IOE
VIL / VIH
TR / TF
VA
2.5 V
±50 ppm
10.9 mA 27.6 mA
1 uA
0.3VDD (max) / 0.7VDD(min)
3.3 V
±50 ppm
34.1mA
1 uA
Nominal
Total Frequency Stability*
100MHz
Maximum; OE = GND
At OE pin
Maximum; 20/80% of VA; Output load (CL) = 2pF
Single Ended output swing (Pk-Pk)
22 mA
11.3mA
22.7mA
0.3VDD (max) / 0.7VDD(min)
500/710ps 620/420ps 580/390ps 450/470ps 430/400ps 420/380ps
0.35V
1.2 V
0.71V
1.1V
45 / 55%
0.70V
0.35V
0.35V
1.2 V
0.79V
2 V
45 / 55%
0.70V
0.35V
VM
SYM
Worst case
Output valid time after VDD meets the specified range &
OE transition
TST
Start-up time
400 us
400 us
PJRMS
CCJMax
φJ
Period Jitter
Cycle to Cycle Jitter
Phase Jitter
3.6 ps
33 ps
2.9 ps
22 ps
1.0 ps
2.5 ps
19 ps
2.9 ps
27 ps
3 ps
29 ps
1.0 ps
2.6 ps
24 ps
100MHz
100MHz; measured over 12k cycles
12k to 20MHz (nominal)
Standard Frequencies:
Output Frequency
FOUT
25
33.333
40
50
62.5
66.66
100
125
Note: Above specifications are typical at room temperature (25°C ) unless otherwise specified.
* Inclusive of initial frequency accuracy, operating temperature range, supply variation, load variation, 3 times solder reflow, shock, vibration and 10 years aging at 25°C.
Package Outline and Dimensions
Typical PCB Land Pattern
Pin #1 ID
3.60
1.30 ±0.05
5.0 ±0.05
0.85 ±0.05
0.0-0.05
R
0.15°
1.50 ±0.05
OE
VDD
7.0 x 5.0
(mm)
6L SMD
7.0 x 5.0mm
7.00 ±0.05
N/C
OUTB
OUT
0.25 Ref
2.54 Bsc
GND
0.203 Ref.
1.60
1.60
Top View
Side View
Bottom View
2.60
Pin #1 ID
Chamfer
0.30 x 45°
0.85 ±0.05
0.0-0.05
1.00 ±0.05
0.64 ±0.05
3.20 ±0.05
VDD
OE
5.0 x 3.2
(mm)
6L SMD
5.0 x 3.2mm
OUTB
OUT
N/C
5.00 ±0.05
1.27 Bsc
GND
1.08 ±0.05
0.203 Ref.
0.90
1.50
Top View
Bottom View
Side View
Oct 24, 2011
www.IDT.com
©2011 Integrated Device Technology, Inc
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
