DATASHEET
QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
ICS348
Description
Features
The ICS348 field programmable clock synthesizer
generates up to 9 high-quality, high-frequency clock outputs
including multiple reference clocks from a low frequency
crystal or clock input. The ICS348 has 4 independent
on-chip PLLs and is designed to replace crystals and
crystal oscillators in most electronic systems.
• Packaged as 20-pin SSOP (QSOP) (Pb-free)
• Eight addressable registers
• Replaces multiple crystals and oscillators
• Output frequencies up to 200 MHz at 3.3V
• Input crystal frequency of 5 to 27 MHz
• Input clock frequency of 2 to 50 MHz
• Up to nine reference outputs
TM
Using IDT’s VersaClock software to configure PLLs and
outputs, the ICS348 contains a One-Time Programmable
(OTP) ROM to allow field programmability. Programming
features include eight selectable configuration registers, up
to two sets of four low-skew outputs.
• Up to two sets of four low-skew outputs
• Operating voltages of 3.3 V
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving board space and cost.
• Advanced, low power CMOS process
• For one output clock, use the ICS341 (8-pin). For two
output clocks, use the ICS342 (8-pin). For three output
clocks, use the ICS343 (8-pin). For more than three
outputs, use the ICS345 or ICS348.
The ICS348 is also available in factory programmed custom
versions for high-volume applications.
Block Diagram
3
VDD
CLK1
CLK2
PLL1
OTP
ROM
with
PLL
S2:S0
3
CLK3
PLL2
PLL3
PLL4
Divide
Logic
and
Output
Enable
Control
Values
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
Crystal or
clock input
X1/ICLK
Crystal
Oscillator
X2
GND
2
External capacitors are
required with a crystal input.
PDTS
IDT® QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
1
ICS348
REV N 090613
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
