DATASHEET
TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER ICS345
Description
Features
The ICS345 field programmable clock synthesizer
generates up to nine high-quality, high-frequency clock
outputs including multiple reference clocks from a
low-frequency crystal or clock input. It is designed to
replace crystals and crystal oscillators in most electronic
systems.
• Packaged as 20-pin SSOP (QSOP) (Pb-free)
• Spread spectrum capability
• Eight addressable registers
• Replaces multiple crystals and oscillators
• Output frequencies up to 200 MHz at 3.3 V
• Input crystal frequency of 5 to 27 MHz
• Input clock frequency of 2 to 50 MHz
• Up to nine reference outputs
TM
Using IDT’s VersaClock software to configure PLLs and
outputs, the ICS345 contains a One-Time Programmable
(OTP) ROM to allow field programmability. Programming
features include eight selectable configuration registers, up
to two sets of four low-skew outputs, and optional Spread
Spectrum outputs.
• Up to two sets of four low-skew outputs
• Operating voltages of 3.3 V
• Advanced, low-power CMOS process
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving board space and cost.
• For one output clock, use the ICS341. For two output
clocks, see the ICS342. For three output clocks, see the
ICS343. For more than three outputs, see the ICS348.
The ICS345 is also available in factory programmed custom
versions for high-volume applications.
Block Diagram
3
VDD
PLL1 with
Spread
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
3
OTP
S2:S0
ROM
with
Spectrum
PLL
Divide
Logic
Values
PLL2
PLL3
and
Output
Enable
Control
Crystal or
clock input
X1/ICLK
Crystal
Oscillator
X2
GND
2
External capacitors are
required with a crystal input.
PDTS
IDT® TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
1
ICS345
REV P 090613
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
