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341M-XXT 参数 Datasheet PDF下载

341M-XXT图片预览
型号: 341M-XXT
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 9 页 / 214 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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DATASHEET  
FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER  
ICS341  
Description  
Features  
The ICS341 is a low cost, single-output, field programmable  
clock synthesizer. The ICS341 can generate an output  
frequency from 250 kHz to 200 MHz and may employ  
Spread Spectrum techniques to reduce system  
electro-magnetic interference (EMI).  
8-pin SOIC package  
Highly accurate frequency generation  
M/N Multiplier PLL: M = 1...2048, N = 1...1024  
Output clock frequencies up to 200 MHz  
Four ROM locations for frequency and spread selection  
Spread spectrum capability for lower system EMI  
Center or Down Spread up to 4% total  
Using IDT’s VersaClock software to configure the PLL and  
output, the ICS341 contains a One-Time Programmable  
(OTP) ROM to allow field programmability. Programming  
features include 4 selectable configuration registers.  
Selectable 32 kHz or 120 kHz modulation  
The device employs Phase-Locked Loop (PLL) techniques  
to run from a standard fundamental mode, inexpensive  
crystal, or clock. It can replace multiple crystals and  
oscillators, saving board space and cost.  
Input crystal frequency from 5 to 27 MHz  
Input clock frequency from 2 to 50 MHz  
Operating voltage of 3.3 V  
Advanced, low-power CMOS process  
For two output clocks, use the ICS342. For three output  
clocks, see the ICS343. For more than three outputs, see  
the ICS345 or ICS348.  
The device also has a power-down feature that tri-states the  
clock outputs and turns off the PLLs when the PDTS pin is  
taken low.  
Available in Pb (lead) free packaging  
NOTE: EOL for non-green parts to occur on 5/13/10  
per PDN U-09-01  
The ICS341 is also available in factory programmed custom  
versions for high-volume applications.  
Block Diagram  
VDD  
OTP ROM  
with PLL  
Divider  
2
S1:0  
Values  
PLL Clock Synthesis,  
Spred Spectrum and  
Control Circuitry  
CLK  
Crystal or  
clock input  
X1/ICLK  
Crystal  
Oscillator  
X2  
GND  
External capacitors are  
required with a crystal input.  
PDTS (output and PLL)  
IDT™ / ICS™ FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER  
1
ICS341  
REV K 092109