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270PGI 参数 Datasheet PDF下载

270PGI图片预览
型号: 270PGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 200MHz, CMOS, PDSO20, 0.173 INCH, TSSOP-20]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 11 页 / 218 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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PRELIMINARY DATASHEET  
TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK  
ICS270  
Description  
Features  
The ICS270 field programmable VCXO clock synthesizer  
generates up to eight high-quality, high-frequency clock  
outputs including multiple reference clocks from a  
low-frequency crystal input. It is designed to replace  
crystals and crystal oscillators in most electronic systems.  
Packaged as 20-pin TSSOP  
Eight addressable registers  
Replaces multiple crystals and oscillators  
Output frequencies up to 200 MHz at 3.3 V  
Input crystal frequency of 5 to 27 MHz  
Up to eight reference outputs  
Up to two sets of four low-skew outputs  
Operating voltages of 3.3 V  
TM  
Using IDT’s VersaClock software to configure PLLs and  
outputs, the ICS270 contains a One-Time Programmable  
(OTP) ROM for field programmability. Programming  
features include VCXO, eight selectable configuration  
registers and up to two sets of four low-skew outputs.  
Controllable output drive levels  
Advanced, low-power CMOS process  
Available in Pb (lead) free packaging  
Using Phase-Locked Loop (PLL) techniques, the device  
runs from a standard fundamental mode, inexpensive  
crystal, or clock. It can replace VCXOs, multiple crystals  
and oscillators, saving board space and cost.  
The ICS270 is also available in factory programmed custom  
versions for high-volume applications.  
Block Diagram  
3
VDD  
CLK1  
CLK2  
CLK3  
CLK4  
CLK5  
CLK6  
CLK7  
CLK8  
3
OTP  
PLL1  
PLL2  
S2:S0  
ROM  
with  
PLL  
Divide  
Logic  
and  
Output  
Enable  
Control  
Values  
VIN  
PLL3  
X1  
X2  
Voltage  
Controlled  
Crystal  
Crystal  
Oscillator  
GND  
2
External capacitors  
are required.  
PDTS  
IDT™ / ICS™ TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK  
1
ICS270  
REV D 052008