ICS1562B
Integrated
Circuit
DATA SHEET
Systems, Inc.
ICS1562B
User Programmable Differential
Output Graphics Clock Generator
User Programmable Differential Output Graphics Clock Generator
Description
Features
The ICS1562B is a very high performance monolithic phase-
locked loop (PLL) frequency synthesizer. Utilizing ICS’s ad-
vanced CMOS mixed-mode technology, the ICS1562B
provides a low cost solution for high-end video clock genera-
tion.
•
Two programming options:
ICS1562B-001 (Parallel Programming)
ICS1562B-201 (Serial Programming)
Supports high-resolution graphics - CLK output to
260 MHz, with 400 MHz options available
•
•
•
Eliminates need for multiple ECL output crystal oscillators
Fully programmable synthesizer capability - not just a
clock multiplier
The ICS1562B hasdifferentialvideoclockoutputs (CLK+and
CLK-) that are compatible with industry standard video DAC.
Another clock output, LOAD, is provided whose frequency is
derived from the main clock by a programmable divider. An
additional clock output is available, LD/N2, which is derived
from the LOAD frequency and whose modulus may also be
programmed.
•
•
Circuitry included for reset of Brooktree RAMDAC pipe-
line delay
VRAM shift clock generation capability
(-201 option only)
•
•
•
External feedback loop capability (-201 option only)
Operating frequencies arefully programmable with direct con-
trol provided for reference divider, prescaler, feedback divider
and post-scaler.
Compact - 16-pin 0.150” skinny SOIC package
Fully backward compatible to ICS1562
Reset of the pipeline delay on Brooktree RAMDAC s may
be performed under register control. Outputs may also be set
to desired states to facilitate circuit board testing.
ICS1562B - 001 Pinout
Simplified Block Diagram - ICS1562B
LOOP
FILTER
AD0
XTAL1
XTAL2
STROBE
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD1
XTAL1
XTAL2
AD2
CRYSTAL
OSCILLATOR
PHASE-
/ R
CHARGE
PUMP
VCO
FREQUENCY
DETECTOR
AD3
VDD
VDDO
IPRG
CLK+
CLK-
PRESCALER
EXTFBK
BLANK
VSS
(-201 only)
MUX
/ A
/ M
LOAD
LD/N2
FEEDBACK DIVIDER
PROGRAMMING
INTERFACE
16-Pin SOIC
MUX
CLK+
/ 2
/ 4
DIFF.
OUTPUT
CLK−
ICS1562B - 201 Pinout
EXTFBK
XTAL1
XTAL2
DATCLK
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DATA
HOLD
BLANK
VDD
/ N1
MUX
DRIVER
LOAD
LD/N2
/ N2
VDDO
IPRG
CLK+
CLK-
DRIVER
VSS
LOAD
LD/N2
Figure 1
16-Pin SOIC
RAMDAC is a trademark of Brooktree Corporation.
IDT™ /1I5C62SB™ReUv Bse1r0/P07r/o04grammable Differential Output Graphics Clock Generator
ICS1562B
1
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
