ICSSSTUA32S869B
Advance Information
Integrated
Circuit
Systems,Inc.
14-Bit Configurable Registered Buffer for DDR2
Pin Configuration
Recommended Application:
•
DDR2 Memory Modules
1
2
3
4
5
6
7
8
9
10
11
•
Provides complete DDR DIMM solution with
ICS97U877
Ideal for DDR2 400, 533 and 667
A
B
C
D
E
F
•
Product Features:
•
•
•
•
•
14-bit 1:2 registered buffer with parity check
functionality
Supports SSTL_18 JEDEC specification on data
inputs and outputs
50% more dynamic driver strength than standard
SSTU32864
Supports LVCMOS switching levels on C1 and
RESET# inputs
Low voltage operation
VDD = 1.7V to 1.9V
Available in 150 BGA package
Green packages available
G
H
J
K
L
M
N
P
R
T
•
•
U
V
W
150 Ball BGA
(Top View)
FunctionalityTruthTable
Inputs
Outputs
QCS#
Dn,
DODT,
DCKE
QODT,
QCKE
RESET#
DCS#
CSR#
CK
CK#
Qn
H
H
H
H
H
H
H
H
H
H
H
H
L
H
X
L
L
L
↑
↓
L
L
L
L
L
L
L
L
H
H
↑
L or H
↑
↓
L or H
↓
Q
0
Q
0
Q
0
L
L
L
L
L
H
H
H
L
L
↑
↓
H
X
L
H
H
Q
0
Q
0
Q
0
L or H
L or H
L
L
H
H
H
H
H
H
L
L
H
H
↑
↑
↓
↓
H
X
L
H
H
Q
0
Q
0
Q
0
L
L or H
L or H
Q
0
H
H
H
H
H
L
↑
↓
Q
0
H
X
H
↑
L or H
↓
L or H
Q
0
Q
0
Q
0
X or
floating
X or
floating
X or
floating
X or
floating
X or
floating
L
L
L
L
1173—10/28/05
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.