AV9107C-13
Integrated
Circuit
Systems, Inc.
CPU Frequency Generator
General Description
Features
Patented on-chip Phase-Locked Loop with VCO
for clock generation
The AV9107C-13 offers a tiny footprint solution for
generating two simultaneous clocks. The AV9107C-13
uses a 20 MHz crystal to generate two PLL synthesis
outputs of 20 and 40 MHz. The Output enable pin will
tristate the 40 MHz output when low (maintaining the 20
MHz output runing in both logic levels). The power pin
takes the device to a low current condition, shutting off the
PLL and forcing both outputs low, when the PD# pin is low.
There is a built-in pull-up on both the OE and PD# inputs.
Provides two synthesized clocks
Generates 20 and 40 MHz output frequencies.
On-chip loop filter
Low power CMOS technology
Single +3.3 or +5 volt power supply
8-pin SOIC package
The device has advanced features which include on-chip
loop filters, tristate outputs, and power-down capability. A
minimum of external components - two decoupling capacitors
and an optional ferrite bead - are all that are required for jitter-
free operation.
Pin Configuration
Note: Crystal is 20 MHz
Block Diagram
AV 9107-13 RevB052197
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
