ICS95V857
Integrated
Circuit
Systems,Inc.
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
RecommendedApplication:
Pin Configuration
•
•
DDR Memory Modules / Zero Delay Board Fan Out
Provides complete DDR registered DIMM solution
with ICSSSTVF16857, ICSSSTVF16859 or
ICSSSTV32852
GND
CLKC0
CLKT0
VDD
CLKT1
CLKC1
GND
1
2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
GND
CLKC5
CLKT5
VDD
CLKT6
CLKC6
GND
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
ProductDescription/Features:
GND
GND
•
•
Low skew, low jitter PLL clock driver
1 to 10 differential clock distribution (SSTL_2)
CLKC2
CLKT2
VDD
CLKC7
CLKT7
VDD
•
•
Feedback pins for input to output synchronization
PD#forpowermanagement
VDD
PD#
CLK_INT
CLK_INC
VDD
AVDD
AGND
GND
CLKC3
CLKT3
VDD
CLKT4
CLKC4
GND
FB_INT
FB_INC
VDD
FB_OUTC
FB_OUTT
GND
CLKC8
CLKT8
VDD
CLKT9
CLKC9
GND
•
•
SpreadSpectrum-tolerantinputs
Auto PD when input signal removed
Specifications:
•
Meets PC3200 Class A+ specification for DDR-I 400
support
•
Covers all DDRI speed grades
48-Pin TSSOP/TVSOP
6.10 mm Body, 0.50 mm Pitch = TSSOP
4.40 mm Body, 0.40 mm Pitch = TVSOP
SwitchingCharacteristics:
•
•
•
CYCLE - CYCLE jitter: <50ps
OUTPUT - OUTPUT skew: <40ps
Period jitter:±30ps
Block Diagram
FB_OUTT
FB_OUTC
CLKT0
CLKC0
Functionality
CLKT1
CLKC1
INPUTS
OUTPUTS
Control
CLKT2
CLKC2
PLL State
PD#
AVDD PD# CLK_INT CLK_INC CLKT CLKC FB_OUTT FB_OUTC
Logic
CLKT3
CLKC3
GND
GND
H
H
L
H
L
L
H
L
L
H
L
Bypassed/off
Bypassed/off
H
H
H
CLKT4
CLKC4
2.5V
(nom)
L
L
L
H
L
H
L
Z
Z
L
Z
Z
H
L
Z
Z
L
Z
Z
H
L
off
off
on
on
off
FB_INT
FB_INC
CLKT5
CLKC5
2.5V
(nom)
PLL
CLK_INC
CLK_INT
2.5V
(nom)
CLKT6
CLKC6
H
H
X
H
L
2.5V
(nom)
H
H
Z
H
Z
CLKT7
CLKC7
2.5V
(nom)
<20MHz)(1)
Z
Z
CLKT8
CLKC8
CLKT9
CLKC9
0674U—01/27/09
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
