ICS83026I-01
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
GENERAL DESCRIPTION
FEATURES
The ICS83026I-01 is a low skew, 1-to-2 Dif- • Two LVCMOS / LVTTL outputs
ICS
HiPerClockS™
ferential-to-LVCMOS/LVTTL Fanout Buffer and
• Differential CLK, nCLK input pair
a member of the HiPerClockS™family of
High Performance Clock Solutions from
ICS. The differential input can accept most dif-
• CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
ferential signal types (LVPECL, LVDS, LVHSTL, HCSL and
SSTL) and translate to two single-ended LVCMOS/LVTTL out-
puts.The small 8-lead SOIC footprint makes this device ideal
for use in applications with limited board space.
• Maximum output frequency: 350MHz
• Output skew: 15ps (maximum)
• Part-to-part skew: 600ps (maximum)
• Additive phase jitter, RMS: 0.03ps (typical)
• Small 8 lead SOIC package saves board space
• 3.3V core, 3.3V, 2.5V or 1.8V output operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
VDD
CLK
nCLK
OE
VDDO
Q0
1
2
3
4
8
7
6
5
Q1
GND
Q0
CLK
nCLK
Q1
ICS83026I-01
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
OE
TopView
VDD
CLK
nCLK
OE
VDDO
Q0
1
2
3
4
8
7
6
5
Q1
GND
ICS83026I-01
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
TopView
83026BMI-01
www.icst.com/products/hiperclocks.html
REV.A JANUARY 16, 2006
1
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
