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01AL 参数 Datasheet PDF下载

01AL图片预览
型号: 01AL
PDF下载: 下载PDF文件 查看货源
内容描述: 2 : 1差分至LVPECL多路复用器 [2:1 DIFFERENTIAL-TO-LVPECL MULTIPLEXER]
分类和应用: 复用器
文件页数/大小: 19 页 / 299 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS85301  
2:1  
DIFFERENTIAL-TO-LVPECL MULTIPLEXER  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS85301 is a high performance 2:1 Differ- 2:1 LVPECL MUX  
ICS  
HiPerClockS™  
ential-to-LVPECL Multiplexer and a member of the  
One LVPECL output  
HiPerClockS™family of High Performance Clock  
Solutions from ICS.The ICS85301 can also per-  
form differential translation because the differ-  
Two differential clock inputs can accept: LVPECL, LVDS,  
CML  
ential inputs accept LVPECL, CML as well as LVDS levels.  
The ICS85301 is packaged in a small 3mm x 3mm  
16 VFQFN package, making it ideal for use on space con-  
strained boards.  
Maximum input/output frequency: 3GHz  
Translates LVCMOS/LVTTL input signals to LVPECL levels  
by using a resistor bias network on nPCLK0, nPCLK0  
Propagation delay: 490ps (maximum)  
Part-to-part skew: 150ps (maximum)  
Additive phase jitter, RMS: 0.009ps (typical)  
Full 3.3V or 2.5V operating supply  
-40°C to 85°C ambient operating temperature  
Available in both standard and lead-free RoHS compliant  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
PCLK0  
nPCLK0  
0
16 15 14 13  
PCLK0  
1
2
12  
VEE  
Q
Q
nQ  
nPCLK0  
11  
PCLK1  
nPCLK1  
1
PCLK1  
3
4
10 nQ  
VEE  
nPCLK1  
9
5
6
7
8
CLK_SEL  
VBB  
ICS85301  
16-Lead VFQFN  
3mm x 3mm x 0.95 package body  
K Package  
TopView  
1
2
3
4
5
6
7
8
PCLK0  
nPCLK0  
PCLK1  
nPCLK1  
VBB  
16  
15  
14  
13  
12  
11  
10  
9
nc  
VEE  
VEE  
VCC  
VEE  
Q
CLK_SEL  
nc  
nQ  
VEE  
VCC  
ICS85301  
16-LeadTSSOP  
4.4mm x 5.0mm x 0.92mm  
package body  
G Package  
TopView  
85301AK  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 16, 2006  
1