CPC700 Memory Controller and PCI Bridge
High-performancecompanionchipforPowerPC60xand7xxprocessors
General
• Provides error tracking/status
Overview
• Extensive programmability
• lwarx/stwx support (reservation cancel-
ling snoops)
The CPC700TM Memory Controller and
PCI Bridge brings high-performance,
real-time control to PowerPC 60x/7xx
driven designs. This single-chip micro-
processor companion is specifically
designed for embedded systems to
provide a general purpose bridge to any
PCI bus.The CPC700 companion chip
also includes a high-speed memory
controller, internal peripherals, and
control for external ROM and external
peripherals.
• Flexible and programmable
error handling
• Supports Address Only cycle
ProcessorInterface
MemoryController
The PowerPCTM processor bus interface
includes the interface to the system
memory controller, as well as the
Processor Local Bus (PLB) master/slave
interface.
This memory controller provides the
local PowerPC processor with a low-
latency access path supporting external
peripherals and 5 banks of local memory.
SDRAM
• 1 level processor address pipelining
• Processor bus arbiter
• Up to 4 banks
• 11x9 to 13x11 addressing (for 2 and 4
internal bank SDRAMs)
• L1 cache coherency support
• Two 32-byte write buffers
This CPC700 companion chip can
function as a host bridge, as the basis for
an intelligent add-in PCI controller, or in
stand-alone modes. This versatility and
the following features can help lower
costs, enhance board efficiency and
reduce your time-to-market.
• 8 MB to 512 MB per bank
Data
Addr.
32-Bi t
Control
ECC
8-Bi t
Data
Addr. Control
13-Bi t
64-Bi t
32 or 64-Bi t
• PowerPC 60x/7xx interface (66 MHz)
• 66 MHz SDRAM interface
UART
UART
Memory Controller
(SDRAM, ROM,
Peripherals)
Processor Interface
64-Bi t
• External peripheral bus
32-Bi t
• PCI 2.1 compliant interface
(32-bit, 25 to 66 MHz)
2C
I
66 MHz Processor Local Bus (PLB)
• Supports internal or external PCI
bus arbitration
32-Bi t
OPB
Bridge
2C
I
• Interrupt controller
PCI Interface
Timers
Interrupt
Controller
• Programmable timers
• Two full-duplex UARTs (16550)
• Two I2C interfaces
JTAG
32-Bi t
Data/Address Control
• Byte swapping options ease
communication in little-endian systems
CPC700BlockDiagram
• JTAG for board-level testing
IBM [ IBM ]
