IBM11N1645L1M
x 64 E12/12, 3.3V, AuMMDL24DSU-001020633. IBM11N1735Q1M x 72 E12/12, 3.3V, AuMMDL24DSU-001020633.
IBM11N1645L
IBM11N1735Q
1M x 64/72 DRAM Module
Features
• 168 Pin JEDEC Standard, Unbuffered 8 Byte
Dual In-line Memory Module
• System Performance Benefits:
-Non buffered for increased performance
• 1Mx64, 1Mx72 Extended Data Out Page Mode
DIMMS
-Reduced noise (35 V /V pins)
SS CC
-Byte write, byte read accesses
-Serial PDs
• Performance:
-60
-6R
-70
• Extended Data Out (EDO) Mode, Read-Modify-
Write Cycles
tRAC
tCAC
tAA
RAS Access Time
CAS Access Time
60ns
15ns
60ns 70ns
17ns 20ns
30ns 35ns
• Refresh Modes: RAS-Only, CBR and Hidden
Refresh
Access Time From Address 30ns
tRC
Cycle Time
104ns 104ns 124ns
25ns 25ns 30ns
• 1024 refresh cycles distributed across 16ms
• 10/10 addressing (Row/Column)
tHPC
EDO Mode Cycle Time
• All inputs and outputs are LVTTL (3.3V) com-
patible
• Card Sizes:
• Single 3.3V ± 0.3V Power Supply
-5.25” x 1.0” x 0.102” (TSOP)
-5.25” x 1.25” x 0.202” (SOJ)
• Au contacts
• Optimized for byte-write, non-parity, or ECC
applications.
• DRAMS in TSOP OR SOJ Packages
Description
IBM11N1645L/IBM11N1735Q industry standard
168-pin 8-byte Dual In-line Memory Modules
(DIMMs) which are organized as 1Mx64 and 1Mx72
high speed memory arrays designed with EDO
DRAMs for non-parity or ECC applications. The x64
DIMM uses 4 1Mx16 EDO DRAMs (TSOP or SOJ)
and the x72 DIMM uses 4 1Mx16 plus 2 1Mx4 EDO
DRAMs (all in SOJ packages). The use of EDO
DRAMs allows for a reduction in Page Mode Cycle
time from 40ns (Fast Page) to 25ns for 60ns DRAM
modules.
(SCL) and Data I/O (SDA) lines to synchronously
clock data between the master (system logic) and
the slave EEPROM device (DIMM). The EEPROM
device address pins (SA0-2) are brought out to the
DIMM tabs to allow 8 unique DIMM/EEPROM
addresses. The first 128 bytes are utilized by the
DIMM manufacturer and the second 128 bytes of
serial PD data are available to the customer.
All IBM 168-pin DIMMs provide a high performance,
flexible 8-byte interface in a 5.25” long space-saving
footprint. Related products include the unbuffered
X72 ECC DIMMs and the buffered DIMMs (x64, x72
parity and x72 ECC Optmized) for applications
which can benefit from the on-card buffers.
The DIMMs use serial presence detects imple-
mented via a serial EEPROM using the two pin I C
2
protocol. This communication protocol uses Clock
Card Outline (TSOP version shown)
(Front)
(Back)
1
85
10 11
94 95
84
168
40 41
124 125
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
50H8035
SA14-4630-02
Revised 5/96
Page 1 of 33
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