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IBM0165805BJ3C-60 参数 Datasheet PDF下载

IBM0165805BJ3C-60图片预览
型号: IBM0165805BJ3C-60
PDF下载: 下载PDF文件 查看货源
内容描述: [EDO DRAM, 8MX8, 60ns, CMOS, PDSO32, 0.400 X 0.825 INCH, PLASTIC, SOJ-32]
分类和应用: 动态存储器光电二极管内存集成电路
文件页数/大小: 32 页 / 353 K
品牌: IBM [ IBM ]
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IBM0165805B8M  
x 812/11, 3.3V, EDO. IBM0165805P8M x 812/11, 3.3V, LP, SR, EDO.  
IBM0165805B  
IBM0165805P  
ADVANCED  
Features  
8M x 8 12/11 EDO DRAM  
• 8,388,608 word by 8 bit organization  
• Single 3.3 ± 0.3V power supply  
• Extended Data Out (Hyper Page Mode)  
• CAS before RAS Refresh  
• Read-Modify-Write  
• Performance:  
-50  
-60  
60ns  
15ns  
30ns  
104ns  
25ns  
tRAC  
tCAC  
tAA  
RAS Access Time  
50ns  
13ns  
25ns  
84ns  
20ns  
CAS Access Time  
- 4096 cycles/Retention Time  
Column Address Access Time  
Cycle Time  
• RAS only Refresh  
tRC  
- 4096 cycles/Retention Time  
tHPC  
Hyper Page Mode Cycle Time  
• 64ms Standard Power (SP) Retention Time  
• 256ms Low Power (LP) Retention Time  
• Hidden Refresh  
• Max. Power Dissipation (-60)  
- Active: 414mW  
- Standby (SP LVCMOS): 3.6mW  
- Standby (LP LVCMOS): 0.72mW  
• Package: SOJ-32 (400mil), TSOP-32 (400mil)  
• Self Refresh (400µA) - LP Version Only  
Description  
The IBM0165805B/P is a dynamic RAM organized  
8,388,608 words by 8 bits. This device is fabricated  
in IBM’s most advanced CMOS silicon gate process  
technology. The circuit and process design allow  
this DRAM to achieve high performance and low  
power dissipation. The IBM0165805B/P operates  
with a single 3.3 ± 0.3V power supply, and inter-  
faces directly with either LVTTL or LVCMOS levels.  
The 23 addresses required to access any bit of data  
are multiplexed (12 are strobed with RAS, 11 are  
strobed with CAS). They are packaged in a 32 pin  
plastic SOJ (400mil×825mil), and a 32pin plastic  
TSOP type II (400mil×825mil).The IBM0165805P  
parts are low power devices supporting Self  
Refresh and a 256ms retention time.  
Pin Description  
Pin Assignments (Top View)  
RAS  
CAS  
Row Address Strobe  
Column Address Strobe  
Read/write Input  
Address Inputs  
Output Enable  
1
V
32  
31  
V
SS  
CC  
2
I/O0  
I/O1  
I/O2  
I/O3  
NC  
I/O7  
WE  
3
30  
29  
I/O6  
I/O5  
A0 - A11  
OE  
4
5
28  
I/O4  
6
27  
26  
V
I/O0 - I/O7  
VCC  
Data Input/output  
Power (+3.3V)  
SS  
7
CAS  
V
CC  
8
25  
24  
OE  
NC  
WE  
VSS  
Ground  
9
RAS  
10  
11  
12  
13  
14  
A0  
23  
A11  
A1  
A2  
A3  
A4  
22  
21  
A10  
A9  
20  
A8  
A7  
A6  
19  
18  
17  
15  
16  
A5  
V
V
SS  
CC  
©IBM Corporation, 1996. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
27H6251  
SA14-4241-02  
10/96  
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