Discontinued (9/98 - last order; 3/99 last ship)
IBM01178052M
x 811/10, 5.0V, EDO. IBM0117805P2M x 811/10, 3.3V, EDO, LP, SR. IBM0117805M2M x 811/10, 5.0V, EDO, LP, SR. IBM0117805B2M x 811/10, 3.3V, EDO.
IBM0117805 IBM0117805M
IBM0117805B IBM0117805P
2M x 8 11/10 EDO DRAM
Features
• Low Power Dissipation
• 2,097,152 word by 8 bit organization
- Active (max) - 75 mA / 60 mA
- Standby: TTL Inputs (max) - 1.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
• Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply
• Standard Power (SP) and Low Power (LP)
- 0.1 mA (LP version)
- Self Refresh (LP version only)
- 200µA (3.3 Volt)
• 2048 Refresh Cycles
- 32 ms Refresh Rate (SP version)
- 128 ms Refresh Rate (LP version)
- 300µA (5.0 Volt)
• High Performance:
• Extended Data Out (Hyper Page) Mode
• Read-Modify-Write
-50 -60 Units
tRAC
tCAC
tAA
RAS Access Time
CAS Access Time
Column Address Access Time
Cycle Time
50
13
25
84
60
15
ns
ns
ns
ns
ns
• RAS Only and CAS before RAS Refresh
• Hidden Refresh
30
tRC
104
25
• Package: TSOP-II 28 (400mil x 725mil)
SOJ 28 (300mil)
tHPC
EDO (Hyper Page) Mode Cycle Time 20
Description
The IBM0117805 is a dynamic RAM organized
2,097,152 words by 8 bits, which has a very low
“sleep mode” power consumption option. These
devices are fabricated in IBM’s advanced 0.5µm
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V ± 0.3V or 5.0V ± 0.5V power supply. The 21
addresses required to access any bit of data are
multiplexed (11 are strobed with RAS, 10 are
strobed with CAS).
Pin Assignments (Top View)
Pin Description
RAS
CAS
Row Address Strobe
Column Address Strobe
Read/Write Input
Address Inputs
1
2
3
4
5
6
7
28
27
26
25
24
Vcc
I/O0
I/O1
I/O2
I/O3
WE
RAS
NC
A10
A0
A1
A2
A3
Vss
I/O7
I/O6
I/O5
I/O4
CAS
OE
A9
A8
A7
A6
A5
WE
A0 - A10
OE
Output Enable
I/O0 - I/O7
VCC
Data Input/Output
Power (+3.3V or +5.0V)
Ground
23
22
21
20
19
8
9
VSS
10
11
12
13
14
18
17
16
15
A4
Vss
Vcc
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4724
SA14-4221-06
Revised 4/97
Page 1 of 31
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