Discontinued (9/98 - last order; 3/99 last ship)
IBM01174054M
x 411/11, 5.0V, EDOMMDD64DSU-001012331. IBM0117405P4M x 411/11, 3.3V, EDO, LP, SRMMDD64DSU-001012331. IBM0117405M4M x 411/11, 5.0V, EDO, LP, SRMMDD64DSU-001012331. IBM0117405B4M x 411/11, 3.3V, EDOMMDD64DSU-001012331.
IBM0117405 IBM0117405M
IBM0117405B IBM0117405P
4M x 4 11/11 EDO DRAM
Features
• Low Power Dissipation
• 4,194,304 word by 4 bit organization
- Active (max) - 75 mA / 60 mA
- Standby: TTL Inputs (max) - 1.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
• Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply
• Standard Power (SP) and Low Power (LP)
- 0.1 mA (LP version)
- Self Refresh (LP version only)
- 200µA (3.3 Volt)
• 2048 Refresh Cycles
- 32 ms Refresh Rate (SP version)
- 128 ms Refresh Rate (LP version)
- 300µA (5.0 Volt)
• High Performance:
• Extended Data Out (Hyper Page) Mode
• Read-Modify-Write
-50
50
13
25
84
20
-60 Units
tRAC
tCAC
tAA
RAS Access Time
60
15
ns
ns
ns
ns
ns
• RAS Only and CAS before RAS Refresh
• Hidden Refresh
CAS Access Time
Column Address Access Time
Cycle Time
30
tRC
104
25
• Package: SOJ 26/24 (300mil x 675mil)
TSOP-26/24 (300mil x 675mil)
tHPC
EDO (Hyper Page) Mode Cycle Time
Description
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V ± 0.3V or 5.0V ± 0.5V power supply. The 22
addresses required to access any bit of data are
multiplexed (11 are strobed with RAS, 11 are
strobed with CAS).
The IBM0117405 is a dynamic RAM organized
4,194,304 words by 4 bits, which has a very low
“sleep mode” power consumption option. These
devices are fabricated in IBM’s advanced 0.5µm
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
Pin Assignments (Top View)
Pin Description
RAS
CAS
Row Address Strobe
Column Address Strobe
Read/Write Input
Address Inputs
Vcc
I/O0
I/O1
WE
RAS
NC
1
2
3
4
5
6
26
25
24
23
22
21
Vss
I/O3
I/O2
CAS
OE
WE
A0 - A10
OE
Output Enable
I/O0 - I/O3
VCC
Data Input/Output
Power (+3.3V or +5.0V)
Ground
A9
VSS
A10
A0
A1
A2
A3
8
9
19
18
17
16
15
14
A8
A7
A6
A5
A4
Vss
10
11
12
13
Vcc
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4726
SA14-4228-05
Revised 4/97
Page 1 of 31
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