IBM01164004M
x 412/10, 5.0V. IBM0116400P 4M x 412/10, 3.3V, LP, SR. IBM0116400M 4M x 412/10, 5.0V, LP, SR. IBM0116400B4M x 412/10, 3.3V.
IBM0116400 IBM0116400M
IBM0116400B IBM0116400P
4M x 4 12/10 DRAM
Features
• Low Power Dissipation
• 4,194,304 word by 4 bit organization
- Active (max) - 85 mA / 75 mA / 65 mA
- Standby: TTL Inputs (max) - 2.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
• Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply
• Standard Power (SP) and Low Power (LP)
- 0.2 mA (LP version)
- Self Refresh (LP version only)
- 200µA (3.3 Volt)
• 4096 Refresh Cycles
- 64 ms Refresh Rate (SP version)
- 256 ms Refresh Rate (LP version)
- 300µA (5.0 Volt)
• High Performance:
• Read-Modify-Write
-50
-60
-70
• RAS Only and CAS before RAS Refresh
• Hidden Refresh
tRAC
tCAC
tAA
RAS Access Time
50ns
13ns
25ns
60ns
15ns
30ns
70ns
20ns
35ns
CAS Access Time
• Package: SOJ-28/24 (400milx725mil)
SOJ-26/24 (300milx675mil)
Column Address Access Time
Cycle Time
tRC
95ns 110ns 130ns
35ns 40ns 45ns
TSOP-26/24 (300milx675mil)
tPC
Fast Page Mode Cycle Time
Description
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V ± 0.3V or 5.0V ± 0.5V power supply. The 22
addresses required to access any bit of data are
multiplexed (12 are strobed with RAS, 10 are
strobed with CAS).
The IBM0116400 is a dynamic RAM organized
4,194,304 words by 4 bits, which has a very low
“sleep mode” power consumption option. These
devices are fabricated in IBM’s advanced 0.5µm
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
Pin Assignments (Top View)
Pin Description
RAS
CAS
Row Address Strobe
Column Address Strobe
Read/Write Input
Address Inputs
28/24
26/24
WE
Vcc
I/O0
I/O1
WE
RAS
A11
1
2
3
4
5
6
28
27
26
25
24
23
Vss
I/O3
I/O2
CAS
OE
Vcc
I/O0
I/O1
WE
RAS
A11
1
2
3
4
5
6
26
25
24
23
22
21
Vss
I/O3
I/O2
CAS
OE
A0 - A11
OE
Output Enable
I/O0 - I/O3
VCC
Data Input/Output
Power (+3.3V or +5.0V)
Ground
A9
A9
VSS
A10
A0
A1
A2
A3
9
10
11
12
13
14
A10
A0
A1
A2
A3
8
9
10
11
12
13
20
19
18
17
16
15
A8
A7
A6
A5
A4
Vss
19
18
17
16
15
14
A8
A7
A6
A5
A4
Vss
Vcc
Vcc
©IBM Corporation, 1996. All rights reserved.
Use is further subject to the provisions at the end of this document.
43G9396
SA14-4203-04
Revised 11/96
Page 1 of 27
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