Discontinued (9/98 - last order; 3/99 last ship)
IBM01161651M
x 1612/8, 5.0V, EDOMMDD61DSU-001015031. IBM0116165P1M x 1612/8, 3.3V, EDO, LP, SRMMDD61DSU-001015031. IBM0116165M1M x 1612/8, 5.0V, EDO, LP, SRMMDD61DSU-001015031. IBM0116165B1M x 1612/8, 3.3V, EDOMMDD61DSU-001015031.
IBM0116165 IBM0116165M
IBM0116165B IBM0116165P
1M x 16 12/8 EDO DRAM
Features
• Low Power Dissipation
• 1,048,576 word by 16 bit organization
- Active (max) - 55 mA / 50 mA
- Standby: TTL Inputs (max) - 1.0 mA
- Standby: CMOS Inputs (max)
- 1.0 mA (SP version)
• Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply
• Standard Power (SP) and Low Power (LP)
- 0.1 mA (LP version)
- Self Refresh (LP version only)
- 200µA (3.3 Volt)
• 4096 Refresh Cycles
- 64 ms Refresh Rate (SP version)
- 256 ms Refresh Rate (LP version)
- 300µA (5.0 Volt)
• High Performance:
• Extended Data Out (Hyper Page) Mode
• Dual CAS Byte Read/Write
• Read-Modify-Write
-50 -60 Units
tRAC
tCAC
tAA
RAS Access Time
CAS Access Time
Column Address Access Time
Cycle Time
50
13
25
60
15
30
ns
ns
ns
ns
ns
• RAS Only and CAS before RAS Refresh
• Hidden Refresh
tRC
84 104
25
tHPC
EDO (Hyper Page) Mode Cycle Time 20
• Package: TSOP-II 50/44 (400mil x 825mil)
SOJ 42/42 (400mil)
Description
vide high performance, low power dissipation, and
high reliability. The devices operate with a single
3.3V ± 0.3V or 5.0V ± 0.5V power supply. The 20
addresses required to access any bit of data are
multiplexed (12 are strobed with RAS, 8 are strobed
with CAS).
The IBM0116165 is a dynamic RAM organized
1,048,576 words by 16 bits, which has a very low
“sleep mode” power consumption option. These
devices are fabricated in IBM’s advanced 0.5µm
CMOS silicon gate process technology. The circuit
and process have been carefully designed to pro-
Pin Assignments (Top View)
Pin Description
RAS
LCAS / UCAS
WE
Row Address Strobe
L/U Column Address Strobe
Read/Write Input
Address Inputs
50/44 TSOP
42/42 SOJ
VCC
IO0
IO1
IO2
IO3
VCC
IO4
IO5
IO6
IO7
NC
1
50
VSS
VCC
IO0
IO1
IO2
IO3
VCC
IO4
IO5
IO6
IO7
1
2
3
4
5
6
7
8
42
VSS
2
3
4
5
49 IO15
48 IO14
47 IO13
46 IO12
41 IO15
40 IO14
39 IO13
38 IO12
A0 - A11
OE
Output Enable
6
7
8
9
10
11
45
VSS
37
VSS
44 IO11
43 IO10
42 IO9
41 IO8
40 NC
36 IO11
35 IO10
34 IO9
I/O0 - I/O15
VCC
Data Input/Output
Power (+3.3V or +5.0V)
Ground
9
33
32 NC
IO8
10
11
VSS
NC
NC
NC
WE
RAS
A11 19
A10
A0
A1
A2
A3
15
16
17
18
36 NC
35 LCAS
34 UCAS
33 OE
32 A9
31 A8
30 A7
29 A6
28 A5
27 A4
NC
WE
RAS
A11 15
A10
A0
12
13
14
31 LCAS
30 UCAS
29 OE
28 A9
27 A8
26 A7
16
17
18
19
20
21
22
23
24
25
A1
A2
25 A6
24 A5
A3
VCC
20
21
23 A4
22
VSS
VCC
26
VSS
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4723
SA14-4225-06
Revised 4/97
Page 1 of 31
IBM [ IBM ]
