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MP7626KP 参数 Datasheet PDF下载

MP7626KP图片预览
型号: MP7626KP
PDF下载: 下载PDF文件 查看货源
内容描述: 微处理器兼容缓冲乘法的16位数字 - 模拟转换器 [Microprocessor Compatible Buffered Multiplying 16-Bit Digital-to-Analog Converter]
分类和应用: 转换器微处理器
文件页数/大小: 12 页 / 121 K
品牌: EXAR [ EXAR CORPORATION ]
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MP7626  
ELECTRICAL CHARACTERISTICS (CON’T)  
25°C  
Typ  
Tmin to Tmax  
Min Max  
Parameter  
Symbol  
Min  
Max  
Units  
Test Conditions/Comments  
SWITCHING  
CHARACTERISTICS  
2, 4  
Data Valid to Write Set-Up Time  
Write Strobe Width  
t
250  
125  
ns  
ns  
DS  
t
SW  
NOTES:  
1
Full Scale Range (FSR) is 10V for unipolar mode.  
Guaranteed but not production tested.  
Digital input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur.  
See timing diagram.  
2
3
4
5
Specified values guarantee functionality. Refer to other parameters for accuracy.  
Specificationsare subject to change without notice  
ABSOLUTE MAXIMUM RATINGS (TA = +25°C unless otherwise noted)1, 2  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17 VDC  
Voltage at Any Digital Input . . . . . GND –0.5 to VDD +0.5 V  
DC Voltage Applied to IOUT1 or IOUT2 . . GND –0.5 to +17 V  
Voltage at VREF, RFB Inputs . . . . . . . . . . . . . . . . . . . . . . +25 V  
Storage Temperature Range . . . . . . . . . . . . –65°C to 150°C  
Package Power Dissipation Rating to 75°C  
CDIP, PDIP, PLCC . . . . . . . . . . . . . . . . . . . . . . . 1050mW  
Derates above 75°C . . . . . . . . . . . . . . . . . . . . . 14mW/°C  
NOTES:  
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a  
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating  
conditions for extended periods may affect device reliability.  
2
Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps  
(HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short  
transients outside the supplies of less than 100mA for less than 100µs.  
APPLICATION NOTES  
Refer to Applications Section for Additional Information  
LATCH CONTROL  
TIMING DIAGRAM  
Data Changing  
Data Stable  
MSB  
LSB  
FUNCTION  
LATCH  
LATCH  
0
1
0
1
0
0
1
1
Data Latched (Held)  
Transfer (DB15-DB8) to DAC  
Transfer (DB7-DB0) to DAC  
Transparent Mode  
DATA  
LATCH  
t
S
OUTPUT  
t
t
SW  
DS  
Rev. 2.00  
4