MP7541B
ORDERING INFORMATION
Package
Type
Temperature
INL
(LSB)
DNL
(LSB)
Gain Error
(LSB)
Part No.
Range
–40 to +85°C
–40 to +85°C
–40 to +85°C
–40 to +85°C
Plastic Dip
Plastic Dip
SOIC
MP7541BKN
MP7541BJN
MP7541BKS
MP7541BJS
ꢀ1/2
ꢀ1
ꢀ1/2
ꢀ1
ꢀ5
ꢀ8
ꢀ5
ꢀ8
ꢀ1/2
ꢀ1
ꢀ1/2
ꢀ1
SOIC
–55 to +125°C
–55 to +125°C
Ceramic Dip
Ceramic Dip
MP7541BTD*
MP7541BSD*
ꢀ1/2
ꢀ1
ꢀ1/2
ꢀ1
ꢀ5
ꢀ8
*Contact factory for non-compliant military processing
PIN CONFIGURATIONS
See Packaging Section for Package Dimensions
1
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
I
I
R
I
I
R
FB
OUT1
FB
OUT1
2
3
4
5
6
7
8
9
V
V
V
V
OUT2
REF
OUT2
REF
GND
(MSB) BIT 1
BIT 2
GND
(MSB) BIT 1
BIT 2
DD
DD
BIT 12 (LSB)
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 12 (LSB)
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 3
BIT 4
BIT 5
BIT 6
BIT 3
BIT 4
BIT 5
BIT 6
18 Pin PDIP, CDIP (0.300”)
N18, D18
18 Pin SOIC (Jedec, 0.300”)
S18
PIN OUT DEFINITIONS
PIN NO.
NAME
DESCRIPTION
Current Output 1
PIN NO.
NAME
BIT 7
DESCRIPTION
1
2
3
4
5
6
7
8
9
I
I
10
11
12
13
14
15
16
17
18
Data Input Bit 7
OUT1
Current Output 2
Ground
BIT 8
Data Input Bit 8
OUT2
GND
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 9
Data Input Bit 9
Data Input Bit 1 (MSB)
Data Input Bit 2
Data Input Bit 3
Data Input Bit 4
Data Input Bit 5
Data Input Bit 6
BIT 10
BIT 11
BIT 12
Data Input Bit 10
Data Input Bit 11
Data Input Bit 12 (LSB)
Positive Power Supply
Reference Input Voltage
Internal Feedback Resistor
V
V
DD
REF
R
FB
Rev. 2.00
2