MP3274
t1
t2
CS
WR
t 5
t3
t4
ADDRESS
ADEN
t6
STL
STS
t7
t8
t9
t14
t12
t10
t11
DB0-DB11
RD = 0
Previous ADC Data
New ADC Data
t13
DB0-DB11
RD = 1
HIGH Z
Figure 1. Timing for ADC Channel Select Start Conversion
Time
Interval
Tmin to
Tmax
Comments/Test Conditions
Limits
25°C
ADC Read Timing
CS to RD Set-Up Time
CS to RD Hold Time
RD to Data Valid Delay
t15
t16
t17
0
0
100
150
100
0
0
150
200
150
ns min
ns min
ns max
ns max
ns max
Load ckt of Figure 3., CL = 20 pF
Load ckt of Figure 3., CL = 100 pF
Load ckt of Figure 4.
Bus Relinquish Time after RD
High
RD Pulse Width
t18
t19
100
150
ns min
Table 3. ADC Read Timing
(See Figure 2.)
t15
t16
t 19
CS
RD
DATA
Valid
t17
t18
Figure 2. Timing for ADC Read
Rev. 4.00
8
EXAR [ EXAR CORPORATION ]
