EUP9261
Application Circuit
Figure2.
min.
Symbol
Parts
Purpose
Recommend
max.
Remarks
Threshold voltage ≤ Overdischarge
detection voltage *1
N channel
MOSFET
FET1
Charge control
--
--
--
Gate to source withstand voltage ≥
Charge voltage*2
Threshold voltage ≤ Overdischarge
detection voltage *1
N channel
MOSFET
FET2
R1
Discharge control
--
--
--
Gate to source withstand voltage ≥
Charge voltage*2
Resistance should be as small as
possible to avoid lowering of the
overcharge detection accuracy caused
by VDD pin current. *3
ESD protection
For power fluctuation
Resistor
470Ω
300Ω
1kΩ
Install a capacitor of 0.022µF or higher
C1
R2
Capacitor
Resistor
For power fluctuation
0.1µF
2kΩ
0.022µF
300Ω
1.0µF
4kΩ
between VDD and VSS. *4
Protection for
Select a resistance as large as possible
to prevent current when a charger is
reversely connected. *5
reverse connection
of a charger
*1 If the threshold voltage of an EFT is low, the FET may not cut the charging current.
If an FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be stoped
before overdischarge is detected.
*2 If the withstand voltage between the gate and source is lower than the charger voltage, the FET may destroy.
*3 If R1 has a high resistance, the voltage between VDD and VSS may exceed the absolute maximum rating when a charger is
connected reversely since the current flows from the charger to the IC.
Insert a resistor of 300Ω or higher as R1 for ESD protection.
*4 If a capacitor of less than 0.022µF is installed as C1,DO may oscillate when load short-circuiting is detected.
Be sure to install a capacitor of 0.022µF or higher as C1.
*5 If R2 has a resistance higher than 4kΩ, the charging current may not be cut when a high-voltage charger is connected.
Remark The DP pin should be open.
Caution
The above connection diagram and constant will not guarantee successful operation. Perform through evaluation
using the actual application to set the constant.
DS9261 Ver2.4 Jan. 2007
6