EUP8020X
EUP8020X
Parameter
Conditions
Unit
Min.
Typ. Max.
Battery Recharge Threshold
VO(REG) VO(REG) VO(REG)
Recharge threshold, VRCH
V
-0.150
250
-0.10 -0.050
Deglitch time for recharge detect,
t(DEGL)
375
500
ms
STAT1, STAT2, and PG Outputs
Low-level output saturation voltage,
VOL
ISET2, Charge Enable (CE ), Timer and Termination Enable (TTE ), and Timer Enable (TE ) Inputs
IO = 5 mA
0.25
V
V
Low-level input voltage, VIL
High-level input voltage, VIH
IIL = 10 µA
IIL = 20 µA
0
1.4
0.4
CE , TE or TTE low-level input
-1
current, IIL
CE , TE or TTE high-level input
current, IIH
1
µA
V
s
ISET2 low-level input current, IIL
ISET2 high-level input current, IIH
ISET2 high-Z input current, IIH
Timers
IISET2 = 0
IISET2 = VCC
-20
40
1
Precharge time, t(PRECHG)
Taper time, t(TAPER)
1,650
1,940 2,230
1,940 2,230
8020A,8020B,8020C,8020D, 8020E,8020G 1,650
Charge time, t(CHG)
8020A,8020B,8020C,8020D,8020G
8020E,8020F
16,500 19,400 22,300
23,080 27,160 31,235
200
s
µA
Timer fault recovery current, I(FAULT)
Sleep Comparator
Sleep-mode entry threshold voltage,
V(SLP)
V
V
CC ≤ VI(OUT)
+100 mV
CC ≥ VI(OUT)
+190mV
2.3 V ≤ VI(OUT) ≤ VO(REG)
2.3 V ≤ VI(OUT) ≤ VO(REG)
V
Sleep mode exit threshold voltage,
V(SLPEXIT)
Sleep mode deglitch time
Thermal Shutdown Thresholds
Thermal trip threshold, T(SHTDWN)
Thermal hysteresis
Undervoltage Lockout
Undervoltage lockout V(UVLO)
Hysteresis
250
375
500
2.6
ms
165
30
°C
Decreasing VCC
2.2
2.4
20
V
mV
K
× V
(TAPER)
K
× V
(TERM)
(SET)
(SET)
(3)
(4)
7
I
=
I
=
O(TAPER)
O(TERM)
R
R
SET
SET
DS8020X Ver 1.1 June 2006
EUTECH [ EUTECH MICROELECTRONICS INC ]
