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EUA5212QIR0 参数 Datasheet PDF下载

EUA5212QIR0图片预览
型号: EUA5212QIR0
PDF下载: 下载PDF文件 查看货源
内容描述: 具备四个可选增益设置2 -W立体声音频功率放大器 [2-W Stereo Audio Power Amplifier with Four Selectable Gain Settings]
分类和应用: 放大器功率放大器
文件页数/大小: 18 页 / 567 K
品牌: EUTECH [ EUTECH MICROELECTRONICS INC ]
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EUA5212  
Pin Configurations  
Package  
Pin Configurations (Top View)  
TSSOP-24 with a Thermal  
Pad exposure on the bottom  
of the package  
Pin Description  
PIN  
PIN  
11  
I/O  
DESCRIPTION  
BYPASS  
GAIN0  
GAIN1  
Tap to voltage divider for internal mid-supply bias generator  
2
I
I
Bit 0 of gain control  
3
Bit 1 of gain control  
1,12  
GND  
LHPIN  
LIN  
Ground connection for circuitry. Connected to thermal pad.  
13,24  
6
I
I
Left channel headphone input, selected when  
is held high.  
SE/BTL  
Common left input for fully differential input. AC ground for single-ended  
10  
inputs.  
LLINEIN  
LOUT+  
LOUT-  
5
4
9
I
Left channel line input, selected when  
is held low.  
SE/BTL  
O
Left channel positive output in BTL mode and positive output in SE mode.  
Left channel negative output in BTL mode and high-impedance in SE mode.  
The input for PC Beep mode. PC-BEEP is enabled when a > 1-V (peak-to-peak)  
square wave is input to PC-BEEP or PCB ENABLE is high.  
O
PC-BEEP  
14  
I
I
is the input MUX control input. When the  
terminal is held  
HP/LINE  
HP/LINE  
high, the headphone inputs (LHPIN or RHPIN [6, 20]) are active. When the  
17  
HP/LINE  
terminal is held low, the line BTL inputs (LLINEIN or RLINEIN [5,  
HP/LINE  
23]) are active.  
PVDD  
RHPIN  
7,18  
20  
I
I
Power supply for output stage.  
Right channel headphone input, selected when  
is held high  
SE/BTL  
Common right input for fully differential input. AC ground for single-ended  
RIN  
8
I
inputs.  
RLINEIN  
ROUT+  
ROUT-  
23  
21  
16  
I
O
O
Right channel line input, selected when  
is held low.  
SE/BTL  
Right channel positive output in  
Right channel negative output in  
mode and positive output in SE mode.  
mode and high-impedance in SE mode.  
BTL  
BTL  
When held low, this terminal place the entire device, except PC-BEEP detect  
circuitry, in shutdown mode.  
22  
15  
19  
I
I
I
SHUTDOWN  
SE/BTL  
VDD  
Input and output MUX control. When this terminal is held high, the LHPIN or  
RHPIN and SE output is selected. When this terminal is held low, the LLINEIN  
or RLINEIN and  
output are selected.  
BTL  
Analog VDD input supply. This terminal needs to be isolated from PVDD to  
achieve highest performance.  
DS5212 Ver 1.7 May. 2005  
3