EtronTech
EM6AA320-XXMS
8Mx32 DDR SDRAM
D.C. Characteristics
(VDD =2.5 ± 5%, TA = 0~70 °C)
6
3.3 3.6
4
5
Parameter & Test Condition
Symbol
IDD0
Unit
Max
OPERATING CURRENT :
One bank; Active-Precharge;
tRC=tRC(min); tCK=tCK(min); DQ,DM and DQS inputs
changing once per clock cycle; Address and control
inputs changing once every two clock cycles.
500 460 350 310 280 mA
600 540 480 440 400 mA
OPERATING CURRENT :
One bank; Active-Read-
Precharge; BL=4; CL=4; tRCDRD=4*tCK; tRC=tRC(min);
tCK=tCK(min); lout=0mA; Address and control inputs
changing once per clock cycle
IDD1
PRECHARGE POWER-DOWN STANDBY CURRENT:
All banks idle; power-down mode; tCK=tCK(min);
CKE=LOW
IDD2P 120 120 100 80
80 mA
IDLE STANDLY CURRENT :
CKE = HIGH;
CS#=HIGH(DESELECT); All banks idle; tCK=tCK(min);
Address and control inputs changing once per clock
cycle; VIN=VREF for DQ, DQS and DM
IDD2N 210 200 175 170 170 mA
ACTIVE POWER-DOWN STANDBY CURRENT :
bank active; power-down mode; CKE=LOW;
tCK=tCK(min)
one
IDD3P 120 120 100 80
80 mA
ACTIVE STANDBY CURRENT :
CS#=HIGH;CKE=HIGH; one bank active ;
IDD3N 300 280 260 240 240 mA
IDD4R 640 610 580 550 520 mA
IDD4W 550 525 500 480 460 mA
tRC=tRC(max);tCK=tCK(min);Address and control inputs
changing once per clock cycle; DQ,DQS,and DM inputs
changing twice per clock cycle
OPERATING CURRENT BURST READ :
BL=2; READS;
Continuous burst; one bank active; Address and control
inputs changing once per clock cycle; tCK=tCK(min);
lout=0mA;50% of data changing on every transfer
OPERATING CURRENT BURST Write :
BL=2;
WRITES; Continuous Burst ;one bank active; address
and control inputs changing once per clock cycle;
tCK=tCK(min); DQ,DQS,and DM changing twice per clock
cycle; 50% of data changing on every transfer
AUTO REFRESH CURRENT :
tCK=tCK(min)
t
RC=tRFC(min);
IDD5
IDD6
750 720 650 610 580 mA
mA
SELF REFRESH CURRENT:
Sell Refresh Mode ;
8
8
5
5
5
CKE<=0.2V;tCK=tCK(min)
BURST OPERATING CURRENT 4 bank operation:
Four bank interleaving READs; BL=4;with Auto
Precharge; tRC=tRC(min); tCK=tCK(min); Address and
control inputschang only during Active, READ , or WRITE
command
IDD7 1100 1050 1000 950 900 mA
Note:
1. Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device.
2. All voltages are referenced to VSS.
3. These parameters depend on the cycle rate and these values are measured by the cycle rate
under the minimum value of tCK and tRC. Input signals are changed one time during tCK.
4. Power-up sequence is described in previous page.
9
Rev 0.7
May. 2006