Et r on Tech
EM6A9325
4M x 32 LPSDRAM
Overview
The EM6A9325 Hand-held LPSDRAM is a 128M bits high-speed CMOS synchronous DRAM with low power
consumption organized as 1,048,576 words by 32 bits by 4 banks. The Hand-held functions are new features of the size
of the memory array and the refresh period during Self-Refresh to be programmable by which the self refresh current is
drastically reduced.
High data transfer rate is achieved by the pipeline architecture with a synchronous interface, burst oriented Read and
write accesse, muti banks operation and programmable burst lengths. The EM6A9325 provides Read or Write burst
lengths of 1, 2, 4, 8, or full page, with a burst termination option. Through the programming burst type, burst length, CAS
latency, and driving strength in mode register and extended mode register, a variety with high performance is fulfilled and
useful in a variety of wide bandwidth, high performance and low power application.
Block Diagram
Column
Decoder
4096
X 256 X 32
CELL ARRAY
(BANK #0)
Sense
Amplifier
CO N T R OL
S IG N A L
GE N ER A T OR
CL K
CKE
CLO CK
BUFFER
Sense
Amplifier
CS #
4096X 256
CELL ARRAY
(BANK #1)
X 32
CO M M A ND
DECODER
RA S#
CA S#
WE#
M O D E
R E G IS T E R
Column
Decoder
CO LU MN
COUN TER
A 1 0 /A P
Column
Decoder
4096
CELL ARRAY
(BANK #2)
X 256 X 32
ADDRESS
BUFFER
A 0
A 9
A 1 0
A 1 1
B A 0
B A 1
Sense
Amplifier
REFRESH
COUN TER
Sense
Amplifier
DQ
4096
X 256 X 32
BUFFER
CELL ARRAY
(BANK #3)
DQ 0
D Q 3 1
Column
Decoder
D Q M 0 ~3
Preliminary
2
Rev 0.4
June 2003
ETRON [ ETRON TECHNOLOGY, INC. ]
