24C32 / 24C64
E E
Figure 3: Output Acknowledge
1
8
9
SCL
DATA IN
DATA OUT
START
ACKNOWLEDGE
Device Addressing
The 32K and 64K EEPROM devices all require an 8-bit device address word following a start condition to enable the
chip for a read or write operation (see to Figure 4 on page 7).
The device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown.
This is common to all the Serial EEPROM devices.
The next 3 bits are the A2, A1 and A0 device address bits for the 32K/64K EEPROM. These 3 bits must compare to
their corresponding hardwired input pins.
The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a "0". If a compare is not made, the chip will return to a
standby state.
BEIJING ESTEK ELECTRONICS CO.,LTD
5
ESTEK [ Estek Electronics Co. Ltd ]
