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M13S64164A-4TVAG2Y 参数 Datasheet PDF下载

M13S64164A-4TVAG2Y图片预览
型号: M13S64164A-4TVAG2Y
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 4MX16, 0.7ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, LEAD FREE, TSOP2-66]
分类和应用: 动态存储器双倍数据速率光电二极管内存集成电路
文件页数/大小: 49 页 / 1219 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
M13S64164A (2Y)  
Automotive Grade  
Absolute Maximum Rating  
Parameter  
Voltage on VDD & VDDQ supply relative to VSS  
Voltage on inputs relative to VSS  
Symbol  
VDD, VDDQ  
VINPUT  
Value  
Unit  
V
-1.0 ~ 3.6  
-1.0 ~ 3.6  
V
Voltage on I/O pins relative to VSS  
VIO  
-0.5 ~ VDDQ+0.5  
-40 ~ +85  
V
°C  
TA (V grade)  
Operating ambient temperature  
°C  
TA (VA grade)  
TSTG  
-40 ~ +105  
-55 ~ +150  
Storage temperature  
°C  
W
Power dissipation  
PD  
IOS  
1
Short circuit current  
50  
mA  
Note:  
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.  
Functional operation should be restricted to recommend operation condition.  
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.  
DC Operation Conditions & Specifications  
DC Operation Conditions  
Recommended operating conditions (Voltage reference to VSS = 0V)  
Parameter  
Symbol  
Min  
Max  
Unit  
Note  
Supply voltage  
VDD  
VDDQ  
2.3  
2.3  
2.7  
V
V
V
V
V
V
I/O Supply voltage  
I/O Reference voltage  
2.7  
VREF  
0.49*VDDQ  
VREF - 0.04  
VREF + 0.15  
-0.3  
0.51*VDDQ  
VREF + 0.04  
VDDQ + 0.3  
VREF - 0.15  
1
2
I/O Termination voltage (system)  
Input logic high voltage  
VTT  
VIH (DC)  
VIL (DC)  
Input logic low voltage  
VIN (DC)  
-0.3  
VDDQ + 0.3  
V
Input Voltage Level, CLK and CLK inputs  
VID (DC)  
0.36  
0.71  
VDDQ + 0.6  
1.4  
V
-
3
4
Input Differential Voltage, CLK and CLK inputs  
V–I Matching: Pullup to Pulldown Current Ratio  
VI (Ratio)  
Input leakage current: Any input 0V VIN VDD  
μ A  
μ A  
IL  
-2  
-5  
2
5
(All other pins not tested under = 0V)  
Output leakage current (DQs are disable; 0V VOUT VDDQ)  
IOZ  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Oct. 2012  
Revision : 1.0 4/49