欢迎访问ic37.com |
会员登录 免费注册
发布采购

M12L16161A_1 参数 Datasheet PDF下载

M12L16161A_1图片预览
型号: M12L16161A_1
PDF下载: 下载PDF文件 查看货源
内容描述: 512K X 16位X 2Banks同步DRAM [512K x 16Bit x 2Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 29 页 / 698 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
 浏览型号M12L16161A_1的Datasheet PDF文件第1页浏览型号M12L16161A_1的Datasheet PDF文件第2页浏览型号M12L16161A_1的Datasheet PDF文件第4页浏览型号M12L16161A_1的Datasheet PDF文件第5页浏览型号M12L16161A_1的Datasheet PDF文件第6页浏览型号M12L16161A_1的Datasheet PDF文件第7页浏览型号M12L16161A_1的Datasheet PDF文件第8页浏览型号M12L16161A_1的Datasheet PDF文件第9页  
ESMT  
M12L16161A  
Operation temperature condition -40~85℃  
DQ0 ~ 15  
VDD/VSS  
Data Input / Output  
Power Supply/Ground  
Data inputs/outputs are multiplexed on the same pins.  
Power and ground for the input buffers and the core logic.  
Isolated power supply and ground for the output buffers to provide improved  
noise immunity.  
VDDQ/VSSQ Data Output Power/Ground  
No Connection/  
N.C/RFU  
This pin is recommended to be left No Connection on the device.  
Reserved for Future Use  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Voltage on any pin relative to VSS  
Voltage on VDD supply relative to VSS  
Storage temperature  
Symbol  
VIN,VOUT  
VDD,VDDQ  
TSTG  
Value  
-1.0 ~ 4.6  
-1.0 ~ 4.6  
-55 ~ + 150  
0.7  
Unit  
V
V
°C  
Power dissipation  
PD  
W
Short circuit current  
IOS  
50  
MA  
Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.  
Functional operation should be restricted to recommended operating condition.  
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.  
DC OPERATING CONDITIONS  
°C  
Recommended operating conditions (Voltage referenced to VSS = 0V, TA=-40 to 85  
)
Parameter  
Supply voltage  
Symbol  
VDD,VDDQ  
VIH  
Min  
3.0  
2.0  
-0.3  
2.4  
-
Typ  
Max  
Unit  
V
Note  
3.3  
3.6  
Input logic high voltage  
Input logic low voltage  
Output logic high voltage  
Output logic low voltage  
Input leakage current  
Output leakage current  
3.0  
VDD+0.3  
V
1
VIL  
0
-
0.8  
-
V
2
VOH  
V
IOH =-2mA  
VOL  
-
0.4  
5
V
IOL = 2mA  
IIL  
-5  
-
uA  
uA  
3
4
IOL  
-5  
-
5
Note : 1.VIH (max) = 4.6V AC for pulse width 10ns acceptable.  
2.VIL (min) = -1.5V AC for pulse width 10ns acceptable.  
3.Any input 0V VIN VDD+ 0.3V, all other pins are not under test = 0V.  
4.Dout is disabled, 0V VOUT VDD.  
°C  
CAPACITANCE (VDD = 3.3V, TA = 25 , f = 1MHz)  
Pin  
Symbol  
Min  
Max  
Unit  
CLOCK  
RAS , CAS , WE , CS , CKE, LDQM,  
UDQM  
CCLK  
2.5  
4.0  
pF  
CIN  
2.5  
5.0  
pF  
ADDRESS  
CADD  
COUT  
2.5  
4.0  
5.0  
6.5  
pF  
pF  
DQ0 ~DQ15  
Elite Semiconductor Memory Technology Inc.  
Publication Date : May. 2007  
Revision : 1.1 3/29