ESMT
M12L128168A (2L)
AC CHARACTERISTICS (AC operating condition unless otherwise noted)
-5
-6
-7
Parameter
Symbol
Unit
Note
MIN
MAX MIN
MAX MIN
MAX
CAS latency = 3
5
10
-
6
7
CLK cycle time
tCC
ns
1
1000
1000
1000
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
10
10
4.5
-
-
5.4
-
-
5.4
CLK to valid
output delay
tSAC
ns
ns
1,2
2
-
6
6
6
2
-
2
-
2
-
Output data
hold time
tOH
2
-
2
-
2
-
CLK high pulse width
CLK low pulse width
Input setup time
tCH
tCL
2
-
2.5
2.5
1.5
1
-
2.5
2.5
1.5
1
-
ns
ns
ns
ns
ns
3
3
3
3
2
2
-
-
-
-
-
-
tSS
tSH
tSLZ
1.5
0.85
1
Input hold time
-
-
-
CLK to output in Low-Z
-
1
-
1
-
CAS latency = 3
CAS latency = 2
-
4.5
-
5.4
-
5.4
CLK to output
in Hi-Z
tSHZ
ns
-
-
6
-
6
-
6
Note:
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns. transient time compensation should be considered.
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jun. 2012
Revision: 1.3 6/45
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
