ESMT
M12L128168A (2N)
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted
Version
Parameter
Symbol
Test Condition
Unit Note
-5
-6
-7
Operating Current
(One Bank Active)
ICC1
Burst Length = 1, tRC ≥ tRC(min), IOL = 0 mA
110 100
90
mA
mA
1,2
ICC2P
2
2
CKE ≤ VIL(max), tCC = tCC(min)
CKE & CLK ≤ VIL (max), tCC = ∞
Precharge Standby Current
in power-down mode
ICC2PS
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = tCC(min)
ICC2N
20
10
Input signals are changed one time during 2tCC
Precharge Standby Current
in non power-down mode
mA
mA
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
input signals are stable
ICC2NS
ICC3P
5
5
CKE ≤ VIL(max), tCC = tCC(min)
CKE & CLK ≤ VIL(max), tCC = ∞
Active Standby Current
in power-down mode
ICC3PS
CS
≥
≥
VIH(min), tCC=15ns
CKE VIH(min),
ICC3N
25
15
mA
Input signals are changed one time during 2clks
Active Standby Current
in non power-down mode
(One Bank Active)
≥
≤
0.2V
All other pins
VDD-0.2V or
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
input signals are stable
ICC3NS
ICC4
mA
mA
Operating Current
(Burst Mode)
I
OL = 0 mA, Page Burst, 4 Banks activated
120
110
100
1,2
Refresh Current
ICC5
ICC6
210 200 190
2
mA
mA
tRFC ≥ tRFC(min)
CKE ≤ 0.2V
Self Refresh Current
Note:
1. Measured with outputs open.
2. Input signals are changed one time during 2 CLKS.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jun. 2012
Revision: 1.1 4/45
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
