ESMT
F49L800UA/F49L800BA
Operation Temperature Condition -40°C~85°C
7. FUNCTIONAL DESCRIPTION
7.1 Device operation
This section describes the requirements and use
of the device bus operations, which are initiated
through the internal command register. The
register is composed of latches that store the
command, address and data information needed
to execute the command. The contents of the
register serve as inputs to the internal state
machine. The state machine outputs dictate the
function of the device. The F49L800UA
/F49L800BA features various bus operations as
Table 3.
Table 3. F49L800UA/F49L800BA Operation Modes Selection
DQ8~DQ15
ADDRESS
A8
A18 A11
A5
|
DQ0~DQ7
DESCRIPTION
WE
OE
RESET
CE
BYTE
=VIH
BYTE
=VIL
|
|
|
A9
A6
A1 A0
A12 A10
A7
A2
L, Vss±
0.3V(3)
Reset(3)
X
X
X
X
High Z High Z
High Z
DQ8~DQ14=
High Z
DQ15=A-1
Read
L
L
L
L
H
H
H
L
H
H
H
AIN
AIN
X
Dout
DIN
Dout
DIN
Write
Output Disable
H
High Z High Z
High Z High Z
High Z
High Z
V
CC±±
0.3V
VCC±±
0.3V
Standby
X
X
X
Sector Protect(2)
Sector Unprotect(2)
Temporary sector unprotect
Auto-select
L
L
X
H
H
X
L
L
X
VID
SA
SA
X
X
X
X
X
L
X
X
H
H
L
L
DIN
DIN
DIN
X
X
X
X
VID
X
H
VID
AIN
See Table 4
DIN
High Z
Notes:
1. L= Logic Low = VIL, H= Logic High = VIH, X= Don't Care, SA= Sector Address, VID=10V to 10.5V.
AIN= Address In, DIN = Data In, Dout = Data Out.
2. The sector protect and unprotect functions may also be implemented via programming equipment.
3. See “Reset Mode” section.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jan. 2008
Revision: 1.2 5/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
