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F25L08PA-50PIG 参数 Datasheet PDF下载

F25L08PA-50PIG图片预览
型号: F25L08PA-50PIG
PDF下载: 下载PDF文件 查看货源
内容描述: 3V只有8兆位串行闪存,配有双 [3V Only 8 Mbit Serial Flash Memory with Dual]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 32 页 / 490 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
F25L08PA  
Operation Temperature Condition -40°C~85°C  
Table 1: F25L08PA Sector Address Table - Continued  
Block Address  
Sector Size  
(Kbytes)  
Block  
2
Sector  
Address range  
A19 A18 A17 A16  
47  
:
4KB  
:
02F000H – 02FFFFH  
0
0
0
0
0
0
1
0
0
0
1
0
:
32  
31  
:
4KB  
4KB  
:
020000H – 020FFFH  
01F000H – 01FFFFH  
:
1
0
16  
15  
:
4KB  
4KB  
:
010000H – 010FFFH  
00F000H – 00FFFFH  
:
0
4KB  
000000H – 000FFFH  
„ STATUS REGISTER  
The software status register provides status on whether the flash  
memory array is available for any Read or Write operation,  
whether the device is Write enabled, and the state of the memory  
Write protection. During an internal Erase or Program operation,  
the status register may be read only to determine the completion  
of an operation in progress. Table 2 describes the function of  
each bit in the software status register.  
Table 2: Software Status Register  
Default at  
Power-up  
Bit  
0
Name  
BUSY  
WEL  
Function  
Read/Write  
1 = Internal Write operation is in progress  
0 = No internal Write operation is in progress  
1 = Device is memory Write enabled  
0 = Device is not memory Write enabled  
0
0
R
R
1
2
3
4
5
BP0  
BP1  
BP2  
Indicate current level of block write protection (See Table 3)  
Indicate current level of block write protection (See Table 3)  
Indicate current level of block write protection (See Table 3)  
1
1
1
0
R/W  
R/W  
R/W  
N/A  
RESERVED Reserved for future use  
Auto Address Increment Programming status  
1 = AAI programming mode  
6
AAI  
0
0
R
0 = Page Program mode  
1 = BP2,BP1,BP0 are read-only bits  
0 = BP2,BP1,BP0 are read/writable  
7
BPL  
R/W  
Note:  
1. Only BP0, BP1, BP2 and BPL are writable.  
2. All register bits are volatility  
3. All area are protected at power-on (BP2=BP1=BP0=1)  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Jul. 2009  
Revision: 1.3 5/32