ESMT
Pin Assignment
AD12250A
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SRSEL
MCLK
MSEL
SDATA
DGND
DVDD
BCLK
M/S
VREF
AGND
AVDD
AINR
VCM
AINL
PD
AD12250A
(Top View)
LRCLK
Pin Description
Pin Name Type
Description
Characteristics
1
2
SRSEL
MCLK
I
I
48kHz/96kHz sample rate selection
Master clock input
Schmitt trigger input buffer
Schmitt trigger input buffer
MCLK divided-by-2 selection
in master mode
3
MSEL
I
Schmitt trigger input buffer
4
5
6
7
8
9
SDATA
DGND
DVDD
BCLK
O
P
Serial audio data output
Digital ground
P
Digital supply
I/O
Bit clock input/output (64Fs)
Left/Right clock input/output (Fs)
Power down, low active
Left channel analog input
Common-mode voltage
Right channel analog input
Analog supply
Schmitt trigger input buffer
Schmitt trigger input buffer
Schmitt trigger input buffer
LRCLK I/O
I
I
PD
10 AINL
11 VCM
O
I
12 AINR
13 AVDD
14 AGND
15 VREF
P
P
O
I
Analog ground
Positive reference voltage
Master/Slave mode selection
16
Schmitt trigger input buffer
M/S
Package Options
Package Type
Part Number
Thermal Information
θJA ≅ 60 °C/W (Condition: still air)
16L TSSOP 4.4mm
AD12250A-SG
Elite Semiconductor Memory Technology Inc.
Publication Date：Apr. 2007
Revision：1.1 2/13
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
