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PKF4128BSI 参数 Datasheet PDF下载

PKF4128BSI图片预览
型号: PKF4128BSI
PDF下载: 下载PDF文件 查看货源
内容描述: [DC-DC Regulated Power Supply Module, 2 Output, 15W, Hybrid,]
分类和应用: 输出元件
文件页数/大小: 8 页 / 232 K
品牌: ERICSSON [ ERICSSON ]
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Output Voltage Adjust (Vadj  
)
Input and Output Impedance  
Output voltage, VO, can be adjusted by using an external resis-  
tor or other external circuitry. If other circuitry is used, the  
slew rate has to be limited to maximum 5 V/ms. To increase  
VO a resistor should be connected between pin 8/9 and 11, and  
to decrease VO a resistor should be connected between pin 8  
and 9 (see fig. 3).  
Both the source impedance of the power feeding and the load  
impedance will interact with the impedance of the DC/DC  
power module.  
Due to the low energy storage capability of the power module,  
it is very important to maintain a low characteristic impedance  
at the input and output of the module i.e. a low ratio between  
L and C.  
Use an electrolytic capacitor across the input if the source  
inductance is higher than 10 µH. Their equivalent series re-  
sistance together with the capacitance acts as a lossless damping  
filter. Suitable capacitor values are in the range 10–100 µF.  
To increase output voltage:  
Rounom=4.14×(1.28×Voi-Vod)/(Vod-Voi) kΩ  
Vi is the initial output voltage when pin 8 and 9 are connected,  
Vo is the desired output voltage.  
Synchronization (Sync)  
To decrease output voltage:  
It is possible to synchronize the switching frequency to an ex-  
ternal symmetrical clock signal. The input can be driven by an  
TTL-compatible output and referenced to the input pin 11.  
Iadj = 943×(1-(Vod/Voi)) µA  
Vi is the initial output voltage when pin 8 and 9 are connected,  
Vo is the desired output voltage.  
Characteristics  
min  
typ  
max  
Unit  
High level  
2.2  
1.2  
0
6.5  
2.2  
0.4  
1.5  
688  
V
*)  
QJOꢀꢁꢂꢃ  
Threshold level  
1.7  
V
Low level  
V
Sink current  
mA  
kHz  
1,'  
Sync. frequency  
*) Rise time <10ns  
520  
QJOꢀꢄꢅ  
Parallel Operation  
Paralleling of several converters is easily accomplished by  
direct connection of the output voltage terminal pins. The load  
regulation characteristic is specifically designed for optimum  
paralleling performance. Load sharing between converters will  
be within 10%. It is recommended not to exceed PO = n ×  
power aOnd n the numOber of paralleled converters, to prevent  
overloading any of the converters and thereby decreasing the  
reliability performance.  
@
Figure 2  
0.9 × P max where P max is the maximum converter output  
,
Current Limiting Protection (Ilim  
)
The output power is limited at loads above the output current  
limiting threshold (Ilim), specified as a minimum value.  
Ordering Information  
Capacitive Load  
Version  
Part No.  
The PKF series has no maximum limit for capacitive load  
on the output. The power module may operate in current  
limiting mode during start-up, affecting the ramp-up and the  
start-up time. For optimum start performance we recommend  
maximum 100 µF/A of IO. Connect capacitors at the point of  
load for best performance.  
Surface mount  
4128B SI  
EN/LZT 146 089 R1A ©Ericsson Power Modules AB, March 2005  
7