PBL 386 15/1
1
2
28 VTX
RRLY
TS
27 AGND
HP
3
26
25
24
23
RSN
DET
RINGX
BGND
TIPX
VBAT
VBAT2
*NC
4
5
C1
C2
6
28-pin SSOP
7
22 C3
21 VCC
20 PLD
8
9
10
19
PLC
PSG
LP
11
12
18 SPR
17
DT
REF
13
14
DR
16 VEE
*NC
15
NC*
* Pins must be left open.
Figure 7. Pin configuration 28 pin SSOP package, top view.
SLIC Operating States
State
C3
C2
C1
SLIC operating state
Active detector
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Open circuit
Ringing state
Active state
Active state
Active state
Active state
Active reverse
Active reverse
Detector is set high
Ring trip detector (active low)
Loop detector (active low)
Line Voltage measurament (pulse train)
Temperature guard (active low)
Ground key detector (active high)
Loop detector (active low)
Ground key detector (active high)
Table 1. SLIC operating states.
9
ERICSSON [ ERICSSON ]
