PBL 386 15/1
Pin Description
Refer to figure 7.
SSOP Symbol
Description
1
2
3
4
RRLY
TS
Ring Relay driver output.
Tip Sense should be connected to TIPX.
HP
High Pass connection for ac/dc separation capacitor CHP. Other end of CHP connects to RINGX (pin 26).
RINGX
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
5
6
BGND
TIPX
Battery Ground, should be tied together with AGND.
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
7
VBAT
On-hook battery voltage. Negative with respect to BGND.
8
9
VBAT2
NC
Off-hook battery voltage, connected in series with a diode.
No Connect. Must be left open.
10
11
PSG
LP
Programmable Saturation Guard. Must be connected to VBAT2.
Low Pass saturation guard filter capacitor connected here to filter out noise and improve PSRR. Other end of
CLP connects to VBAT2.
12
13
DT
DR
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic level
low, indicating off-hook condition. The ring trip network connects to this input.
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic level
low, indicating off-hook condition. The ring trip network connects to this input.
14
15
NC
NC
No Connect. Must be left open.
No Connect. Must be left open.
16
17
18
19
VEE
REF
SPR
PLC
-5V power supply, if not -5 V available connect to VB2 or VBAT (VB2 lower power dissipation than VBAT).
A 15kΩ resistor must be connected between this pin and AGND.
Silent Polarity Reversal. The polarity reversal time can be adjusted with a capasitor connected to AGND.
Prog. Line Current, the constant current part of the DC feed characteristic is programmed by a resistor
connected from this pin to AGND.
20
PLD
Programmable Loop Detector threshold. The loop detection threshold is programmed by a resistor
connected from this pin to AGND.
21
VCC
C3
+5 V power supply.
22
23
24
C1, C2 and C3 are digital inputs Controlling the SLIC operating states. Refer to section
Operating states for details.
C2
}
C1
25
DET
Detector output. Active low when indicating loop or ring trip detection, active high when indicating ground
key detection, active low when indicating temperature alarm.
26
RSN
Receive Summing Node. 400 times the current flowing into this pin equals the metallic (transversal) current
flowing from TIPX to RINGX. Programming networks for two-wire impedance and receive gain connect to the
receive summing node.
27
28
AGND
VTX
Analog Ground, should be tied together with BGND.
Transmit vf output. The ac voltage difference between TIPX and RINGX, the ac metallic voltage, is
reproduced as an unbalanced GND referenced signal at VTX with a gain of -0.5. The two-wire impedance
programming network connects between VTX and RSN.
8
ERICSSON [ ERICSSON ]
