PBL 386 10/2
Pin Description
Refer to figure 7.
PLCC Symbol
Description
1
2
VBAT
Battery supply voltage. Negative with respect to BGND.
VBAT2
An optional second battery voltage, connected in series with a diode, or an external powerhandling
resistor connects to this pin.
3
AOV
Adaptive Overhead Voltage. If the pin is left open then the overhead voltage is set internally to 2.5 VPeak
in off-hook and 1.4 VPeak in on-hook. The overhead voltage will adapt to signals > 2.5 VPeak. If pin is
connected to AGND then no internal overhead voltage is set. The overhead voltage adapts to
0.6 VPeak < signals < 5 VPeak
.
4
5
6
7
PSG
LP
Programmable Saturation Guard. The resistive part of the DC feed characteristic is programmed by a
resistor connected from this pin to VBAT.
Low Pass saturation guard filter capacitor connected here to filter out noise and improve PSRR. Other
end of CLP connects to VBAT.
DT
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic level
low, indicating off-hook condition. The ring trip network connects to this input.
DR
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic
level low, indicating off-hook condition. The ring trip network connects to this input.
8
9
VEE
REF
NU
-5V to VBAT power supply.
A 15kohm resistor should be connected between this pin and AGND.
Not Used. Must be left open.
10
11
PLC
Prog. Line Current, the constant current part of the DC feed characteristic is programmed by a resistor
connected from this pin to AGND.
12
13
PLD
Programmable Loop Detector threshold. The loop detection threshold is programmed by a resistor
connected from this pin to AGND.
VCC
C3
C2
+5 V power supply.
14
15
16
C1, C2 and C3 are digital inputs Controlling the SLIC operating states. Refer to section
Operating states for details.
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C1
17
18
NC
DET
No Connect. Must be left open.
Detector output. Active low when indicating loop or ring trip detection, active high when indicating ground
key detection
19
RSN
Receive Summing Node. 400 times the current flowing into this pin equals the metallic (transversal)
current flowing from TIPX to RINGX. Programming networks for two-wire impedance and receive gain
connect to the receive summing node.
20
21
AGND
VTX
Analog Ground, should be tied together with BGND.
Transmit vf output. The ac voltage difference between TIPX and RINGX, the ac metallic voltage, is
reproduced as an unbalanced GND referenced signal at VTX with a gain of -0.5. The two-wire
impedance programming network connects between VTX and RSN.
22
23
24
25
26
RRLY
TS
Ring Relay driver output.
Tip Sense should be connected to TIPX.
NC
No Connect. Must be left open.
HP
High Pass connection for ac/dc separation capacitor CHP. Other end of CHP connects to RINGX (pin 26).
RINGX
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
27
28
BGND
TIPX
Battery Ground, should be tied together with AGND.
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
8
ERICSSON [ ERICSSON ]
