PBL 385 82
+L
TO
TI
1
2
3
4
5
6
7
8
9
18 RE 2
17 RE 1
16 -L
20
19
1
2
+L
RE2
RE1
-L
TO
1
2
16
15
+L
RE2
RE1
18
3
4
5
6
+C
-L
15 RI
TI
+C
-L
TO
17
16
15
14
13
RI
3
4
5
6
14
13
TI
+C
-L
-L
14 -L
-L
RI
13
GR
NA
NA
NA
NA
GR
NA
NA
NA
NA
NA
NA
NA
NA
NA
12
11
10
9
-L
7
8
12 NA
GR
NA
NA
NA
NA
NA
7
8
11
NA
9
12
11
10 NA
10
18-pin DIP
20-pin SO
16-pin SO
Figure 5. Pin configuration.
Pin Descriptions
Refer to figure 5.
DIP SO 20 SO 16
Name
+L
Function
1
1
1
Output of the transmitter amplifier. Connected to the line through a
polarity guard diode bridge.
2
2
2
TO
Output of the transmitter amplifier. Connected through a resistor of 47 to 100 ohm to -L.
Sets the DC-charateristic of the circuit.The output has a low AC output impedance and
the signal is used to drive a side tone balancing network.
3
4
3
4
3
4
TI
Input of transmit amplifier. Input impedance 17 kΩ ± 20 %.
+C
The positive power supply terminal for most of the circuitry inside the PBL 385 82
(about 1 mA current consumption). The +C-pin is to be connected to a decoupling
capacitor of 47 µF to 150 µF.
6
6
6
GR
-L
The control input for the gain regulation in the receiver.
5
14
16
5
16
18
5
12
14
The negative power terminal, connected to the line through a polarity guard diode
bridge.
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}
15
17
18
17
19
20
13
15
16
RI
Input of the receive signal amplifier. Input impedance is 38 kohm ± 20 %.
RE2
RE1
The receive signal amplifier outputs. Output impedance is approximately 3 ohm.
7
8
9
7
8
9
7
8
9
NA
NA
NA
10
11
12
13
10
11
12
13
14
15
10
11
NA
NA
NA
NA
NA
NA
4