PBL 385 41
Electrical Characterisics
At TAmb = + 25° C. No cable and line rectifier unless otherwise specified.
Ref.
Parameter
fig.
Conditions
Min
Typ
Max
Unit
Line voltage, VL
Transmitting gain, note 1
2
2
IL = 15 mA
IL = 100 mA
20 •10 log (V2 / V3); 1 kHz
RL = 0
RL = 400 Ω
RL = 900 Ω - 2.2 kΩ
1 kHz, RL = 0 to 900 Ω
3.3
11
3.7
13
4.1
15
V
V
2
2
2
2
41
43.5
46
3
43
45.5
48
5
45
47.5
50
7
dB
dB
dB
dB
Transmitting range of
regulation
Transmitting frequency
response
Transmitter input impedance, pin 3
Microphone input impedance
Transmitter dynamic output
2
200 Hz to 3.4 kHz
1 kHz
-1
1
dB
2
2
2
13.5
17
20.5
kΩ
kΩ
Vp
1.7//(2.7) note 3
200 Hz - 3.4 kHz
1.5
≤ 2% distortion, IL = 20 - 100 mA
200 Hz - 3.4 kHz
IL = 0 - 100 mA, V3 = 0 - 1 V
Psoph-weighting, Rel 1 Vrms, RL = 0
20 • 10 log (V4 / V1); 1 kHz
RL = 0 Ω
Transmitter max output
2
2
3
Vp
Transmitter output noise
Receiving gain, note 1
-75
dBPsoph
2
2
2
2
2
2
2
2
-18.5
-16
-13.5
3
-16.5
-14
-11.5
5
-14.5
-12
-9.5
7
dB
dB
dB
dB
dB
kΩ
Ω
RL = 400 Ω
RL = 900 Ω - 2.2 kΩ
1 kHz, RL = 0 to 900 Ω
200 Hz to 3.4 kHz
1 kHz,
1 kHz,
Receiving range of regulation
Receiving frequency response
Receiver input impedance
Receiver output impedance
Receiver dynamic output
note 2
-1
1
38
3(+310)note 3
0.5
200 Hz - 3.4 kHz
Vp
≤ 2% distortion, IL = 20 - 100 mA
Measured with line rectifier
200 Hz - 3.4 kHz, IL = 0 - 100 mA,
V1= 0 - 50 V
A-weighting, Rel 1Vrms, with cable
0 - 3 km, Ø = 0.4 mm
0 - 5 km, Ø = 0.5 mm,
Receiver max output
3
2
0.9
-85
0.3
Vp
dB A
V
Receiver output noise
Mute input voltage
at mute (active low)
DC1 -supply voltage
Pin 9
DC2-supply voltage
Pin 8
2
2
2
IL = 20 - 100 mA
R17 = 4k; IDC1 =2 mA
IL = 20 - 100 mA
IDC = 0 mA
3.4
3.7
4.0
V
2.1
1.95
2.35
2.2
2.6
2.6
V
V
IDC = 2 mA
DC-output pin 8 input
4
VDC = 2.35 V
0.1
µA
leakage current (no supply)
DTMF transmitting gain
DTMF input impedance
2
2
VM = 0.3 V, 1 kHz
1 kHz
24.5
20
26.5
25
28.5
30
dB
kΩ
Notes
1. Adjustable to both higher and lower values with external components.
2. The dynamic output can be doubled, see applications information.
3. External resistor in the test set up.
4. The DC output voltage is reduced at low line voltage (see page 8).
3