PBL 3766
22
21
20
19
18
17
16
15
14
13
1
2
RINGX
TIPX
DT
GND
VCC
RINGRLY
RSG
VBAT
VBAT
E0
3
5
6
RINGRLY
VBAT
RSG
NC
25
24
23
22
21
20
19
NC
VBAT
DT
4
RD
5
VBAT
VBAT
HPR
HPT
7
6
8
RD
7
9
E0
HPR
HPT
8
DET
10
11
VBAT
DET
9
VTX
C2
VTX
VEE
10
11
C1
12
RSN
RDC
Figure 7. Pin configuration, 28-pin plastic leaded chip carrier and 22-pin plastic dual-in-line package, top view.
Pin Description
PLCC: 28-pin, plastic, j-leaded chip carrier. DIP: 22-pin, dual-in-line (batwing), plastic package. Refer to figure 7.
PLCC
DIP
Symbol
Description
1
-
RINGXSense RINGXSense is internally connected to RINGX. RINGXSense is used during manufacturing, but
requires no connection in SLIC applications, i.e. leave open.
2
3
4
5
1
-
GND
VBAT
VCC
Ground.
Refer to PLCC, terminal 6 description.
+5 V power supply.
2
3
RINGRLY Ring relay driver output. Open emitter with grounded collector (npn). Sources 50 mA from ground
to a relay coil connected to a negative voltage. Must be protected by external inductive kick-back
diode. Positive voltage relay driver can be provided as a metal mask option. Contact factory for
availability.
6, 3,
10, 17, 17, 18
24
5, 6, VBAT
Battery supply voltage. Negative with respect to GND. -21 V to -58 V. All VBAT terminals
should be connected to printed circuit board traces to provide heatsinking.
7
4
RSG
Saturation guard programming resistor, RSG, connects from this terminal to VEE. Leave open for
nominal battery voltages from -24 V to -28 V. Connect to VEE for a nominal battery voltage of -48
V. For other battery voltages and for detailed information refer to section Battery Feed.
8
9
-
NC
E0
No internal connection. Note 1.
7
TTL compatible enable input. Enables the DET output, when set to logic level low and disables the
DET output, when set to logic level high. Refer to section Enable Input for detailed information.
10
-
VBAT
Refer to PLCC, terminal 6 description.
4-8
ERICSSON [ ERICSSON ]
