PBL 3726/18A
Maximum Ratings
Parameter
Line voltage, tp = 2 s
Symbol
VL
Min
0
Max
18
Unit
V
Line current, continuous DIP
Line current, continuous SO package
Operating temperature range
Storage temperature range
IL
IL
TAmb
TStg
0
0
-40
-55
130
100
+70
+125
mA
mA
°C
°C
No input should be set on higher level than pin 4 (+C).
MUTE
R
=0-4 KΩ
L
I
M
0 OHM WHEN ARTIFICIAL
LINE IS USED
I
5H+5H
L
L
ARTIFICIAL
LINE
+ LINE
C
1
+
Z
=350Ω
Mic
V
R
=400Ω +400Ω
feed
MIC
PBL 3726/18
with external
components
See fig.4
V
3
600Ω
2
V
+
E= 48.5V
V
1
Z
=350Ω
REC
V
Rec
4
- LINE
C
= 1µF when artificial cable is used.
470µF when not used
1
Figure 2. Test set up without rectifier
bridge.
MUTE
I
M
5H+5H
=0-4 KΩ
R
L
I
Vz=(15-16)V
L
L
+ LINE
C
1µF
1
+
Z
=350Ω
Mic
V
R
=400Ω +400Ω
feed
MIC
PBL 3726/18
with external
components
See fig.4
V
3
600Ω
2
V
+
E= 50V
V
1
Z
=350Ω
REC
V
Rec
4
- LINE
Figure 3. Test set up with rectifier
bridge.
+Line
1
PBL 3726/18
C8
DTMF
input
10
17
18
AD
AM
R14
310Ω
220 nF
AR
AT
REC.
350Ω
12
13
MIC.
350
R16
2.7k
Ω
DC
9
+
8
7
6
5
11
3
2
15 16
14
4
C6
47 nF
R11
R10
62 k
Sense Input
C3
R4
R7
910 Ω
DC supply for
CMOS dialler
18k
Control output
R1
R3
910 Ω
100 nF
∞
∞
6k2
R8
560 Ω
C2
R13
15 nF
R6
75 Ω
Figure 4. Circuit with external compon-
ents for test set up.
R5
22k
Mute
+
+
100
C5 nF
C1
47 µF
C7
R2
R9
11 k
R15
10 Ω
47 µF
11 k
-Line
* Not used in test set up.
DIP package pinning.
2