ISP1105/1106
Advanced USB transceivers
6.2 Pin description
Table 3.
Pin description
Symbol[1]
Pin
Type Description
ISP1105
ISP1106
BSTM WTS, DHTM WTS
WTM
OE
1
1
3
1
I
output enable input (CMOS level with respect to VCC(I/O), active LOW);
enables the transceiver to transmit data on the USB bus
input pad; push pull; CMOS
RCV
2
2
4
2
O
differential data receiver output (CMOS level with respect to VCC(I/O));
driven LOW when input SUSPND is HIGH; the output state of RCV is
preserved and stable during an SE0 condition
output pad; push pull; 4 mA output drive; CMOS
VP
3
4
3
4
5
6
3
4
O
O
single-ended D+ receiver output (CMOS level with respect to VCC(I/O));
for external detection of single-ended zero (SE0), error conditions,
speed of connected device; driven HIGH when no supply voltage is
connected to VCC(5.0) and Vreg(3.3)
output pad; push pull; 4 mA output drive; CMOS
VM
single-ended D− receiver output (CMOS level with respect to VCC(I/O));
for external detection of single-ended zero (SE0), error conditions,
speed of connected device; driven HIGH when no supply voltage is
connected to VCC(5.0) and Vreg(3.3)
output pad; push pull; 4 mA output drive; CMOS
SUSPND
MODE
5
6
5
6
7
-
5
-
I
I
suspend input (CMOS level with respect to VCC(I/O)); a HIGH level
enables low-power state while the USB bus is inactive and drives
output RCV to a LOW level
input pad; push pull; CMOS
mode input (CMOS level with respect to VCC(I/O)); a HIGH level
enables the differential input mode (VPO, VMO) whereas a LOW level
enables a single-ended input mode (VO, FSE0); see Table 5 and
Table 6
input pad; push pull; CMOS
ground supply[2]
GND
die
pad
die
pad
8
9
6
7
-
-
VCC(I/O)
7
7
supply voltage for digital I/O pins (1.65 V to 3.6 V). When VCC(I/O) is
not connected, the (D+, D−) pins are in three-state; this supply pin is
totally independent of VCC(5.0) and Vreg(3.3) and must never exceed the
Vreg(3.3) voltage
SPEED
8
8
10
8
I
speed selection input (CMOS level with respect to VCC(I/O)); adjusts
the slew rate of differential data outputs D+ and D− according to the
transmission speed
LOW — low-speed (1.5 Mbit/s)
HIGH — full-speed (12 Mbit/s)
input pad; push pull; CMOS
D−
9
9
11
12
9
AI/O negative USB data bus connection (analog, differential); for low-speed
mode connect to pin Vpu(3.3) via a 1.5 kΩ resistor
D+
10
10
10 AI/O positive USB data bus connection (analog, differential); for full-speed
mode connect to pin Vpu(3.3) via a 1.5 kΩ resistor
ISP1105_1106_10
© ST-ERICSSON 2009. All rights reserved.
Product data sheet
Rev. 10 — 28 September 2009
5 of 25
ERICSSON [ ERICSSON ]
