Crystal oscillator
►HCSL Output
EG-4121CA H
EG-4101CA H
Item
Symbol
Conditions / Remarks
HCSL
100 MHz to 200 MHz
2.5 V 0.125 V 3.3 V 0.3 V
Output frequency range
Supply voltage
f0
VCC
Please contact us about available frequencies.
Storage temperature
Operating temperature
Frequency tolerance
Current consumption
Disable current
T_stg
T_use
f_tol
ICC
I_dis
SYM
VOH
VOL
L_HCSL
VIH
Storage as single product.
-55 C to +125 C
W:-40 C to +85 C
G: 50 10-6
35 mA Max.
15 mA Max.
45 % to 55 %
0.75 V Typ.
OE=VCC,L_HCSL=50
OE=GND
at outputs crossing point
Symmetry
Output Voltage
DC characteristics
Terminated to GND
OE terminal
-0.3 V Typ.
50
Output load condition (HCSL)
Input voltage
70 % VCC Min.
30 % VCC Max.
500 ps Max.
10 ms Max.
0.3 ps Max.
0.4 ps Max.
0.2 ps Max.
VIL
tr / tf
t_str
Rise time / Fall time
Start-up time
Between 0.175 V and 0.525 V of output
Time at minimum supply voltage to be 0 s
f0 160 MHz
Offset frequency:
160 MHz f0 175 MHz
12 kHz to 20 MHz
f0 >175 MHz
Phase Jitter
tPJ
Product Name
(Standard form)
EG-4121 CA 250.000000MHz P G W A
①
②
③
④⑤⑥⑦
⑤Frequency tolerance
±50 × 10-6
⑥Operating temp.
-40 to +85°C
①Model
②Package type ③Frequency
G
W
④Output(P:LV-PECL, L:LVDS, H: HCSL)
⑤Frequency tolerance ⑥Operating temperature
⑦Frequency aging (A*1: Frequency tolerance include aging)
*1 This includes initial frequency tolerance, temperature variation, supply voltage variation, reflow drift, and aging(+25 C,10 years).
Table 2 Jitter
Item
Symbol
tDJ
tRJ
Specifications
0.3 ps Typ.
2 ps Typ.
Remarks
Deterministic Jitter
Random Jitter
tRMS
tp-p
tacc
2 ps Typ.
20 ps Typ.
3 ps Typ.
Jitter *
(RMS of total distribution)
Peak to Peak
Accumulated Jitter() n=2 to 50000 cycles
* Tested using a DTS-2075 Digital timing system made by WAVECREST with jitter analysis software VISI6.
* Based on SIA-3100C signal integrity analyzer made from WAVECREST.
: LV-PECL, LVDS output
: HCSL output
External dimensions
(Unit:mm)
Footprint (Recommended)
(Unit:mm)
1.4
1.6
#4
#5
#6
#6
#5
#4
E EG-4121
250.000H
GWA 282A
#3
#1
#2
7.0±0.2
#1
#2
5.08
#3
2.54
Pin map
Pin
1
2
3
4
Connection
OE *
2.54
5.08
N.C.
GND
OUT
5.08
5
OUT
6
VCC
OE pin = HIGH : Specified frequency output.
OE pin = LOW : Output is high impedance
#3 is connected to the cover.
*) Standby function is built-in
(Only LV-PECL output model).
To maintain stable operation, provide a 0.01 µF to
0.1 µF by-pass capacitor at a location as near as
possible to the power source terminal of the crystal
product (between VCC - GND).
EPSON [ EPSON COMPANY ]
