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EM488M3244VBD-7FE 参数 Datasheet PDF下载

EM488M3244VBD-7FE图片预览
型号: EM488M3244VBD-7FE
PDF下载: 下载PDF文件 查看货源
内容描述: [Fully Synchronous to Positive Clock Edge]
分类和应用:
文件页数/大小: 18 页 / 1417 K
品牌: EOREX [ EOREX CORPORATION ]
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EM488M3244VBD  
eorex  
256Mb (2M  
4Bank  
32) Synchronous DRAM  
Features  
Description  
Fully Synchronous to Positive Clock Edge  
Single 3.3V 0.3V Power Supply  
LVTTL Compatible with Multiplexed Address  
Programmable Burst Length (B/L) - 1, 2, 4, 8  
or Full Page  
The EM488M3244VBD is Synchronous Dynamic  
Random Access Memory (SDRAM) organized as  
2Meg words x 4 banks by 32 bits. All inputs and  
outputs are synchronized with the positive edge of  
the clock.  
Programmable CAS Latency (C/L) - 2 or 3  
Data Mask (DQM) for Read / Write Masking  
Programmable Wrap Sequence  
Sequential (B/L = 1/2/4/8/full Page)  
Interleave (B/L = 1/2/4/8)  
Burst Read with Single-bit Write Operation  
All Inputs are Sampled at the Rising Edge of  
the System Clock  
The 256Mb SDRAM uses synchronized pipelined  
architecture to achieve high speed data transfer  
rates and is designed to operate at 3.3V low power  
memory system. It also provides auto refresh with  
power saving / down mode. All inputs and outputs  
voltage levels are compatible with LVTTL.  
Available packages: TFBGA-90B(13mmx8mm).  
Auto Refresh and Self Refresh  
4,096 Refresh Cycles / 64ms (15.625us)  
Ordering Information  
Part No  
Max. Freq  
Organization  
Package  
Grade  
Pb  
EM488M3244VBD-75F  
8M X 32  
133MHz @CL3  
TFBGA-90B  
Commercial  
Free  
EM488M3244VBD-7F  
8M X 32  
143MHz @CL3  
TFBGA-90B Commercial  
Free  
EM488M3244VBD-75FE  
EM488M3244VBD-7FE  
EM488M3244VBD-75FI  
EM488M3244VBD-7FI  
8M X 32  
8M X 32  
8M X 32  
8M X 32  
133MHz @CL3  
143MHz @CL3  
133MHz @CL3  
143MHz @CL3  
TFBGA-90B  
TFBGA-90B  
Extend temp.  
Extend temp.  
Free  
Free  
TFBGA-90B Industrial temp. Free  
TFBGA-90B Industrial temp. Free  
Dec. 2013  
www.eorex.com  
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