eorex
EM488M1644VTF
AC Operating Test Conditions
(VDD, VDDQ =3.3V±0.3V, VSS=0V)
Item
Conditions
1.4V/1.4V
Output Reference Level
Output Load
See diagram as below
2.4V/0.4V
Input Signal Level
Transition Time of Input Signals
Input Reference Level
1ns
1.4V
AC Operating Test Characteristics
(VDD, VDDQ =3.3V±0.3V, VSS=0V)
-6
-7
Symbol
tCK
Parameter
Clock Cycle Time
Units
Min. Max. Min. Max.
CL=3
CL=2
CL=3
CL=2
6
7.5
-
-
-
7
10
-
-
-
ns
ns
5.4
5.4
-
5.4
6
tAC
Access Time form CLK
-
-
tCH
tCL
CLK High Level Width
CLK Low Level Width
Clock Input Hold Time
Clock Input Setup Time
Data-out Hold Time
2.5
2.5
2.5
2.5
-
ns
ns
ns
ns
ns
-
-
tCKH
tCKS
tOH
1
-
-
-
1
-
-
-
1.5
2.5
1.5
2.5
Data-out High Impedance Time (Note
tHZ
3
6
3
7
ns
5)
tLZ
tIH
Data-out Low Impedance Time
Input Hold Time
1
1
-
-
-
-
-
1
1
-
-
-
-
-
ns
ns
ns
ns
ns
tIS
Input Setup Time
1.5
1.5
1
1.5
1.5
1
TDS
tDH
Data-in Setup Time
Data-in Hold Time
* All voltages referenced to VSS.
Note 5: tHZ defines the time at which the output achieve the open circuit condition and is not
referenced to output voltage levels.
Jan. 2011
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