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EM484M1644VTC-7F 参数 Datasheet PDF下载

EM484M1644VTC-7F图片预览
型号: EM484M1644VTC-7F
PDF下载: 下载PDF文件 查看货源
内容描述: 64MB ( 1M 】 4Bank 】 16 )同步DRAM [64Mb (1M】4Bank】16) Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 18 页 / 1066 K
品牌: EOREX [ EOREX CORPORATION ]
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eorex  
EM484M1644VTC  
Note 5.2: AC characteristics assumed input rise and fall time (tr & tf) = 1ns.  
If tr & tf is longer than 1ns, transient time compensation should be considered,  
i.e., following compensation should be added to the parameter.  
For example:  
tIS : tr/2 (CLK rising edge )+ tT/2(tf for /cas/ras/we..start edge; tr or tf for address/data pin)-1ns  
tIH : tr/2 (CLK rising edge )+ tT/2(tr for /cas/ras/we..end edge; tr or tf for address/data pin)-1ns  
Note 5.3: tHZ defines the time at which the output achieve the open circuit condition and is not referenced  
to output voltage levels.  
AC Operating Test Characteristics (Continued)  
(VDD=3.3V±0.3V, TA=0°C ~70°C/TA=-25°C ~ +85°C for extended grade)  
-6  
-7  
Symbol  
tRC  
Parameter  
Units  
ns  
Min. Max. Min. Max.  
ACTIVE to ACTIVE Command  
Period (Note 6)  
60  
40  
18  
18  
12  
1
62  
42  
18  
18  
14  
1
ACTIVE to PRECHARGE  
Command Period (Note 6)  
tRAS  
tRP  
100k  
100k  
ns  
PRECHARGE to ACTIVE  
Command Period (Note 6)  
ns  
ACTIVE to READ/WRITE Delay  
Time (Note 6)  
tRCD  
tRRD  
tCCD  
ns  
ACTIVE(one) to ACTIVE(another)  
Command (Note 6)  
ns  
READ/WRITE Command to  
READ/WRITE Command  
CLK  
Date-in to PRECHARGE  
Command  
tDPL  
tBDL  
tROH  
tREF  
2
2
CLK  
CLK  
Date-in to BURST Stop Command  
1
3
1
3
2
Data-out to High  
Impedance from  
PRECHARGE Command  
CL=3  
CL=2  
CLK  
ms  
Refresh Time (4,096 cycle)  
64  
64  
* All voltages referenced to VSS.  
Note 6: These parameters account for the number of clock cycles and depend on the operating frequency  
of the clock, as follows:  
The number of clock cycles = Specified value of timing/clock period (Count Fractions as a whole  
number)  
Dec. 2007  
www.eorex.com  
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