EN23F0QI
Electrical Characteristics
NOTE: VIN=12V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.
Typical values are at TA = 25°C.
PARAMETER
Operating Input Voltage
SYMBOL
PVIN
TEST CONDITIONS
MIN TYP MAX UNITS
4.5
14.0
V
Controller Input Voltage
AVIN
2.5
5.5
V
PVIN Under Voltage
Lock-out
Voltage above which UVLO is not
asserted
UVLOPVIN
AVINUVLOR
2
V
V
AVIN Under Voltage
Lock-out rising
Voltage above which UVLO is not
asserted
2.3
AVIN Under Voltage
Lock-out falling
Voltage below which UVLO is
asserted
AVINOVLOF
IAVIN
2.1
14
V
mA
V
AVIN Pin Input Current
Internal Linear Regulator
Output Voltage
AVINO
3.3
IPVINS
IAVINS
PVIN=12V, AVIN=3.3, ENABLE=0V
PVIN=12V, AVIN=3.3, ENABLE=0V
300
50
μA
μA
Shut-Down Supply
Current
Feedback Node Voltage at:
VIN = 12V, ILOAD = 0, TA = 25°C
Feedback Pin Voltage
Feedback Pin Voltage
VFB
VFB
0.594
0.588
0.60
0.60
0.606
0.612
V
Feedback Node Voltage at:
4.5V ≤ VIN ≤ 14V
V
0A ≤ ILOAD ≤ 15A, TA = -40 to 85°C
VFB pin input leakage current
(Note 3)
Feedback pin Input
Leakage Current
IFB
tRISE
-5
5
nA
C
SS = 47nF
VOUT Rise Time
1.96
2.8
47
3.64
ms
nF
A
(Note 3, Note 4 and Note 5)
Soft Start Capacitor
Range
CSS_RANGE
Continuous Output
Current
IOUT_CONT
IOCP
0
15
Over Current Trip Level
ENABLE Logic High
ENABLE Logic Low
ENABLE Lockout Time
Reference Table 3
22.5
A
V
VENABLE_HIGH 4.5V ≤ VIN ≤ 14V;
VENABLE_LOW 4.5V ≤ VIN ≤ 14V;
TENLOCKOUT
1.8
0
AVIN
0.6
V
8
4
ms
ENABLE pin Input
Current
IENABLE
FSW
180kΩ Pull Down (Note 3)
RFADJ =3kΩ
μA
Switching Frequency
1.0
MHz
MHz
External SYNC Clock
Frequency Lock Range
FPLL_LOCK
Range of SYNC clock frequency
0.8
1.8
1.8
1.6
S_IN Threshold – Low
S_IN Threshold – High
S_OUT Threshold – Low
VS_IN_LO
VS_IN_HI
S_IN Clock Logic Low Level
S_IN Clock Logic High Level
S_OUT Clock Logic Low Level
0.8
2.5
0.8
V
V
V
VS_OUT_LO
S_OUT Threshold –
High
VS_OUT_HI
POKLT
S_OUT Clock Logic High Level
2.5
V
Percentage of Nominal Output
Voltage for POK to be Low
POK Lower Threshold
90
%
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