EM78P447N
OTP ROM
4. FUNCTION DESCRIPTION
O S C I O S C O
/R E S E T
T C C /IN T
W D T T im er
S T A C K 1
S T A C K 2
S T A C K 3
S T A C K 4
S T A C K 5
P C
O scillator/T im ing
C ontrol
P rescale
r
R O M
W D T
T im -e out
Interrupt
C ontrol
Instruction
R egister
R 1(TC C )
A LU
A C C
Instruction
D ecoder
S leep
&
R A M
R 4
R 3
W ake
C ontrol
D A TA & C O N TR O L B U S
IO C 6
IO C 5
R 5
IO C 7
R 7
R6
PPPPPPPP
66666666
01234567
PPPPPPPP
55555555
01234567
PPPPPPPP
77777777
01234567
Fig. 2 Functional Block Diagram
4.1 Operational Registers
1. R0 (Indirect Addressing Register)
R0 is not a physically implemented register. Its major function is to act as an indirect addressing pointer.
Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Register (R4).
2. R1 (Time Clock /Counter)
• Increased by an external signal edge, which is defined by TE bit (CONT-4) through the TCC pin, or
by the instruction cycle clock.
• Writable and readable as any other registers.
• Defined by resetting PAB (CONT-3).
• The prescaler is assigned to TCC, if the PAB bit (CONT-3) is reset.
This specification is subject to change without prior notice.
8
10.21.2004 (V1.0)
ELAN [ ELAN MICROELECTRONICS CORP ]
